I have been wondering about the differential gain in this circuit. We have just completed our lectures on differential amplifiers, and from my understanding the differential gain of this circuit would be very similar to the differential gain of the standard differential pair with a resistive load. So I decided to calculate the look up impedance from the drain of the NMOS. Since will doing so, I will need to ground all the voltage sources, the small signal equivalent of the PMOS would yield only ro. Keeping this, the differential gain should be gmn*(Rop||R||Ron). (Ron and Rob are for NMOS and PMOS respectively. But then since I tried to find the value of R for which differential gain equals 27.1, I am surprised to know it came negative. Where did I go wrong?
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1\$\begingroup\$ differential gain... I am surprised to know it came negative. Where did I go wrong? It depends on your definition...Because one output goes up and the other one goews down - depending on the polarity of the input diff. signal. So it can be positive or negative \$\endgroup\$– LvWCommented Nov 17 at 12:05
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\$\begingroup\$ Aside from the calculations, do you have any intuition about how this circuit operates? What function do the PMOS transistors and resistors? \$\endgroup\$– Circuit fantasistCommented Nov 17 at 14:48
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1\$\begingroup\$ resistors here are basically here for functioning equivalent to Common mode feedback circuitary (CMFB) so that when common mode is there that CMFB circuitary do not function and give output impedance as 1/gmp which is low and when differential mode output impedance should be large so that gain will be large therefore R circuitary is used for that purpose \$\endgroup\$– Rohit RajputCommented Nov 19 at 10:18
2 Answers
I am surprised to know it came negative. Where did I go wrong?
It should be a negative value because the two-transistor differential amplifier inverts the polarity of the input signal just like a single-ended common-source amplifier does.
Basic idea
This brilliant circuit design represents a MOS differential amplifier with dynamic loads in both drains. These unique devices exhibit different behavior depending on the operating mode:
In common mode, they behave as constant-current devices (transistors) having high differential resistance; consequently, the gain is high.
In differential mode, they behave as constant-voltage devices ("diodes") having low differential resistance; consequently, there is no gain.
How to show the idea
The best way to present this clever circuit solution is to build and analyze it step by step, starting from a single-transistor implementation. For simplicity, in this conceptual circuit diagram, I have replaced the lower part (consisting of two source-connected NMOS transistors and a current source) with two input current sources.
Single circuit
Without feedback
If we apply a constant voltage (Vref = 3.32 V) between the M's gate and source, M will behave as a current stabilizer ("source") trying to keep 1 mA current. Figuratively speaking, the transistor behaves as a "dynamic resistor" that changes its resistance opposite of the 1 mA input current source.
simulate this circuit – Schematic created using CircuitLab
As a result, the output voltage Vout highly depends on the small I's variations (there is a gain).
With feedback
Directly: If we connect M's drain to its gate, a voltage-type negative feedback appears, and the transistor begins to behave as a diode (aka "diode-connected transistor").
As a result, the output voltage Vout does not depend on the I's variations (there is no gain).
Through resistor: We can do this connection even through a high-resistance (100 kΩ) resistor R...
... and, since no current flows, the result will be the same.
The conclusion is:
If we want the stage to amplify, there should not be negative feedback.
If we want the stage to not amplify, there should be negative feedback.
Double circuit
The next step that will bring us closer to the final circuit solution is to double these circuits.
Without feedback
With feedback
Combined circuit
I1 = 1 mA, I2 = 1 mA: Next, we need to assemble the two halves into a single differential circuit.
Differential mode
First, we need to ensure that when the input currents change simultaneously in opposite directions (differential mode), the gate voltages remain constant in order to avoid negative feedback. To achieve this, we can connect the two drains via an R1-R2 resistor network (summer), and connect the gates to the midpoint of this network.
I1 = 1.05 mA, I2 = 0.95 mA: To investigate the circuit's operation, we can simultaneously increase I1 by 50 uA and decrease I2 by 50 uA. For this purpose, I have used a behavioral current source I2 that produces a "mirror copy" of the input current I1.
We observe that the output differential voltage changes significantly (by 10 V); there is a significant gain (10V/100uA).
I1 = 0.95 mA, I2 = 1.05 mA: Then let's swap the input current sources: the behavioral current source I1 produces a "mirror copy" of the input current I2.
Common mode
Finally, let's double both input currents I1 and I2 to examine the circuit's behavior in common mode.
Since gates don't draw any current, the midpoint voltage Vgs equals the output voltages Vout1 and Vout2. There is a negative feedback and the transistors behave as diodes; there is no gain.
The three voltage graphs are overlapped.