Reverse-engineering a brushless ESC, could someone help me understand the circuit

Question

So I'm in the process of trying to reverse-engineer a hobby brushless ESC. Above is the schematic for a single half-bridge drive circuit.

VIN is 11.1V

D1 is an unidentified diode; all that I've been able to glean so far from it its orientation and that it has a forward voltage drop of around .54V. Suggestions on obtaining more info about it are welcome

T1 and T2 are NIKOS P75N02LDG (logic-level enhancement mode N-FET)

T3 is LMBT3904-LT1 (general-purpose BJT)

HIGH and LOW come from a 5V micro. LOW is also pulled-down (forgot to show that here. 10K to GND)

Haven't been able to measure C6, could possibly be 10uF-22uF (1206 package, my bet)

My questions are as follows:

1. Why does the high-side FET need to be driven with the BJT circuit and the low-side FET not?
2. What is the purpose of the diode in there (D1) (forward voltage drop of .54V, not sure about what part# it is)? Is it to keep momentary dips in the VIN line from affecting how T2 is driven?
3. As near as I can tell, HIGH is not pulled up or down. When the uC is not configured, this will leave the base floating, which will cause T3 to not conduct (right?), which will cause the gate of T2 to go high, which will cause VIN to go out on the motor line, right?

Answer 1

The LOW signal can be a logic level signal from the 5V MCU because the lower N-Channel FET in the bridge has its Gate-Source voltage referenced to the GND. Due to this the FET can be turned on with a signal that rises above GND.

The HIGH signal needs to be buffered through the 2N3094 because the upper N-Channel FET in the bridge has its Gate-Source voltage referenced to the output. As such the gate of the FET must be at a turn-on threshold above the output voltage in order to turn on. In fact to get the output to go all the way toward VIN it is necessary for the upper FET gate to be driven above VIN to get the FET to turn on.

The C6 and D1 components perform the function of a bootstrap circuit of sorts. As the upper N-FET turns on its SOURCE pin starts to rise in voltage which in turn helps to push the GATE of the FET up higher via C6. In this instance the D1 diode reverse biases to allow the GATE voltage to be pushed up above the VIN level. There are better bootstrap circuit configurations that would work a lot better than this one.

Answer 2

D1 is probably a Schottky of some sort - high speed and low drop.

To expand on Michael Karas' answer above:

When LOW is high and HIGH is low, the lower FET turns on and C6 charges to (Vin-Vd1). When it changes state, the bottom end of C6 is referenced to the source of the upper FET, and its Vgs is (roughly) equal to the voltage across the capacitor (minus any voltage drop when charging the gate). The diode stops it from discharging into the supply.