First consider the difference between C and OpenCL. C is a language while OpenCL is a framework which includes all the resources required to compile to multiple targets and run these in parallel (queues/dispatch/sockets etc).
The Altera OpenCL 'kit' is similar in that it's not just a hardware compiler but also includes DDR controllers, PCI controllers, host drivers etc. This additional hardware that is built in the background and the host driver interface/dispatch etc is the major difference between coding in C and using C-to-HDL tools vs OpenCL for FPGAs.
With a C-to-HDL tool you still need to do the rest of the SOC and all the software drivers and applications to use an FPGA based algorithm accelerator card (for example). With OpenCL the same code can be compiled for multiple targets (cpu/gpu/fpga) without change (though this does add some constraints to what this code is).
And of course there are many good reasons to code the HDL yourself and build the SOC, Altera's OpenCL solution is a very interesting solution to General-Purpose-FPGA programming.
For an example, see Altera's Mandelbrot reference design:
From this you can see the primary source material is the cpp/h files and a board description file, the 'support' software and hardware to get your OpenCL kernel into hardware and talk to it is hidden from the OpenCL layer via the 'Altera OpenCL' SDK.
If you were to come up with a comparable solution using a C-to-HDL tool, you would start with the compiled kernel from the converter, then integrate this with DDR, PCIe and DMA hardware (the SOC) and then code the drivers for passing all this data around and integrate this driver with the OpenCL queue management system. Quite a bit of work.