10
\$\begingroup\$

According to the Wikipedia page on PCI Express, the PCI-e 1X slots have 18 pin positions on two lanes (so 36 pins) and positions 5-9 represent SMBus and JTAG.

I'd like to hook up a µC as an SMBus (essentially I²C) device, and I understand the additional message protocol requirements, but am not exactly sure which pins I'm meant to be interfacing with.

I can see pins for SMCLK, SMDAT, TCK, TDI, TMS, TRST, TDO, WAKE, PERST, PRSNT1, PRSTN2, plus a bunch of PCI-specific stuff. I know that the PRSNT pins have to be shorted, and that there are +12V and +3.3V supplies for the device, but the rest is a bit confusing. Normally with I²C I'd be thinking SDA and SCL, but the pins I'm seeing here look more like the kind of interface I'd expect from SPI, with separate input and output data pins and device select. Is this the JTAG bit, and am I meant to just be looking at SMCLK/SMDAT?

So, my question is two-fold:

  • Which pins should I be concerned with?
  • Do I have to do anything more than jumper the PRSNT1/PRSNT2 pins to get the device registered? That is, can I safely ignore everything but the SMBus interface? In fact, do I even need to mark the card as present with those pins, or is it just for devices that utilise the PCI bus?

Apologies if this seems a rather trivial question - I'm much more adept with software than I am with hardware.

\$\endgroup\$
2
  • \$\begingroup\$ I don't think you should tie the PRSNT pins together since you will not have a PCI Express interface. \$\endgroup\$
    – Pedro_Uno
    Commented Dec 31, 2015 at 18:56
  • 4
    \$\begingroup\$ I've been trying in vain to do this also. It would seem to me that because SMB is an optional part of both the motherboard side and the peripheral side of the PCIe specification, most manufacturers do not bother to implement the wiring for these two pins. Omitting these traces would make an already congested set of PCB routing a little easier to lay out on the PCBs. The Asus motherboard I was trying to use does pull both SDA and CLK high to 3V3, but never accesses them. \$\endgroup\$
    – user98663
    Commented Nov 22, 2018 at 14:57

1 Answer 1

Reset to default
8
\$\begingroup\$

SMCLK and SMDAT are the SMB clock and data connections.

TCK, TDI, TMS, TRST and TDO are the JTAG connections.

The PRSNT1 and PRSNT2 pins are there to tell the host (motherboard hardware and operating system) how many lanes of the PCIe you are going to be using. Since you don't actually intend to use the high-speed lanes at all, I doubt that they're going to be relevant. There aren't going to be any pre-existing drivers for what you're doing, so "registering" the board won't be terribly meaningful. But it would probably be OK to short them anyway, just to let the system know that the board is there.

\$\endgroup\$
2
  • \$\begingroup\$ Thanks. Could you also answer the second part of the question please? i.e. do I have to do anything more than just tie the two PRSNT pins together? Or is that even necessary? \$\endgroup\$
    – Polynomial
    Commented Dec 6, 2013 at 14:11
  • \$\begingroup\$ The lane width is negotiated as part of the link training process at the protocol level -- PRSNT1#/etc are used for hot-plug related features. A fixed number of lanes are routed to each slot, and the training process between peripheral and host will start as wide as possible and train downwards if needed. I've never seen PRSNTx used as part of the process -- it could be if you used it to drive some config straps, but then you count on the card implementing it. \$\endgroup\$
    – Krunal Desai
    Commented Dec 31, 2015 at 19:20

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.