Using 2-ff synchronizers has been a standard for a signal to cross clock boundaries. And there are lots of paper/figures illustrating the mechanism, such as this one:

It seems bclk can only sample the pulse of adat once (at the second rising edge of bclk), which causes output metastability on bq1_dat. How can bq1_dat be sampled "high" on the next active clock edge?

In addition to my question, I'd like to add what I think for a signal to go through safely to another clock domain (suppose 2-FF is enough to satisfy MTBF requirement). Please correct me if any mistakes.

Using 2-ff synchronizers has been a standard for a signal to cross clock boundaries. And there are lots of paper/figures illustrating the mechanism, such as this one:

It seems bclk can only sample the pulse of adat once (at the second rising edge of bclk), which causes output metastability on bq1_dat. How can bq1_dat be sampled "high" on the next active clock edge?

In addition to my question, I'd like to add what I think for a signal to go through safely to another clock domain (suppose 2-FF is enough to satisfy MTBF requirement). Please correct me if any mistakes.

ps: Metastable state does not display "wandering around" waveform, but a level that is neither '1' nor '0'. The following figure shows an example of metastable output.

The original figure came from Lecture notes for EE108A, Lecture 13: Metastability and Synchronization Failure (ow When Good Flip-Flops go Bad) by W. J. Dally.

Using 2-ff synchronizers has been a standard for a signal to cross clock boundaries. And there are lots of paper/figures illustrating the mechanism, such as this one:

It seems bclk can only sample the pulse of adat once (at the second rising edge of bclk), which causes output metastability on bq1_dat. How can bq1_dat be sampled "high" on the next active clock edge?

Using 2-ff synchronizers has been a standard for a signal to cross clock boundaries. And there are lots of paper/figures illustrating the mechanism, such as this one:

It seems bclk can only sample the pulse of adat once (at the second rising edge of bclk), which causes output metastability on bq1_dat. How can bq1_dat be sampled "high" on the next active clock edge?

In addition to my question, I'd like to add what I think for a signal to go through safely to another clock domain (suppose 2-FF is enough to satisfy MTBF requirement). Please correct me if any mistakes.