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CL = (C1 * C2) / (C1 + C2) + Cstray

I have a 12.5pf crystal. DS1302 is happy with 6pf. what is trim capacitors to make him happy using 12.5pf?

12.5-6=6.5pf

(6.5*6.5) / (6.5+6.5) + cstray= 3.25pf + cstray

(13*13) / (13+13) + cstray= 6.5 pf + cstray

so assume cstray is 0, I need 2x 13pf capacitors?

I kinda answered my question, but that is only my guess. My main question will be: what exactly is the Capacitive load? Seems to me that the crystal itself has a Capacitive load (12.5pf in my case); the DS1032 chip has a Capacitive load (6pf), the 2 trimming capacitors obviously have a Capacitive load and last but not least, the PCB board has a Capacitive load (typical 1-5pf?).

enter image description here

The DS1302 also has 2 internal caps: CL CL. if DS1302 is only happy with 6pf load crystal, is that mean that the values for these 2 caps are 6pf and Cstray being 3pf?

CL = (C1 * C2) / (C1 + C2) + Cstray 6pf= (36)/(12) + 3

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  • \$\begingroup\$ Are you asking what the value of Cload should be or generally why a cap load is needed? There are answers for the general case on this site. \$\endgroup\$
    – Andy aka
    Commented Sep 21, 2016 at 7:17
  • \$\begingroup\$ Actually, there are plenty of good answers to the very same question, see electronics.stackexchange.com/questions/250608/… \$\endgroup\$ Commented Sep 21, 2016 at 17:11

3 Answers 3

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If a crystal has a load specification as "12.5pF", it means that the circuit will generate specified nominal frequency if the crystal is LOADED with 12.5pF, from one terminal to the other terminal. The crystal itself does not have this capacitance, it NEEDS this external load to operate in nominal mode.

However, the active circuit in DS1302 is so-called "pierce oscillator", and it requires that this capacitance is split, typically 50-50. This means that two caps are connected in series, and therefore you need two 25pF caps to make the load of 12.5pF. This is for an ideal oscillator circuit. For reality, there should be corrections made to the design.

(1) The DS1302 already has built-in loads for a "6pF" crystal, per specifications. Therefore they must have something like 12pF on both pins, making a fit for crystal capacitance of 6pF. This means that you only need 13pF+13pF caps, you are right in first approximation.

(2) As you rightfully noted, the PCB routing does have some capacitance too, 1-5pF per trace, depending on layout and PCB stack-up. Therefore each cap needs to be reduced by this amount, leaving the cups at 8 - 12 pf each.

(3) Good crystal manufacturer will specify the stray capacitance of their crystal packaging, it could be from a fraction of pF to several pF, depending on crystal case. The IC packaging also has pin-to-pin capacitance, typically up to 1pF, which will add to crystal case. This lump capacitance is applied directly between terminals, and therefore contributes to the crystal load as it is.

So, if the lump stray capacitance is, say, 3pF, the crystal needs to be loaded with 19pF + 19pF. You need to subtract the 12 pF built into DS1302, minus 1-5pF for each trace, which leaves the caps somewhere in between 2pF to 6pF, to provide the nominal oscillator frequency.

The dependence of frequency on deviation from specified load is called "pullability". It depends on the ratio between motion capacitance and load capacitance, with typical value of 0.1- 0.2ppm ppm per 1pF of load mismatch.

Obviously a care needs to be taken of crystal ESR when selecting it, but it would take another "dissertation" to submit. Many IC providers and crystal manufacturers publish good application notes. Google for "pullability" and other special terms, you will find plenty.

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I followed the arguments made by another gentleman but it looks you need two 12.5 pf not 6 or 12 something. attach is link to a technical paper from texas instruments explaining the fact.

http://www.ti.com/lit/an/swra372c/swra372c.pdf

regards- Rahul

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My understanding of DS1302 data sheet is that no external capacitors are required when you connect a 32Khz crystal. The internal "CL" loading capacitors have the proper value to oscillate at the crystal's design frequency (when you specify a parallel-resonant crystal spec'd for a load of 6pf). You ask, "What happens when you substitute a 12.5 pf crystal when a 6 pf crystal is expected ?"
It will still likely oscillate, but at a slightly higher frequency.
It is possible that a lightly-loaded crystal may not oscillate, but these Pierce oscillators generally have excess gain...spec sheet suggests that much higher frequency is possible (up to 2 MHz). Note that oscillator gain drops off at low supply voltage, so a worst-case test would be to run this chip with the lowest supply voltage that you expect, and see if it starts oscillating. Depending what this RTC is used for, I can imagine dire consequences if oscillation doesn't start, or ceases under stress.
You can try adding two 6 pf capacitors:one from X1-to-gnd, another from X2-to-gnd in order to bring oscillating frequency back down (you're aiming for 32768 Hz). This will also make oscillations more robust.
In conclusion, you have a few options:

  • Use no external capacitors and accept a slightly higher frequency

  • Add two 6pf external capacitors to oscillate closer to 32768 Hz, making your 12.5 pf crystal "happy".

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  • \$\begingroup\$ it's 6pf? not 13pf? why? and how much higher frequency will a 12.5pf crystal gives me? obviously, I want it to be as accurate as possible, but also want to use the 12.5pf because simply it's more challenging and fun to do things differently. \$\endgroup\$
    – user83582
    Commented Sep 21, 2016 at 5:21
  • \$\begingroup\$ @Atmega328 - Your crystal was designed to be resonant @ 32768 Hz when loaded with 12.5 pf. Two caps inside DS1302 offer a series combination of 3pf, and I have incorrectly suggested adding another two 6pf (yielding another 3pf) - so you are more correct to boost loading capacitance. How much is frequency affected? More xtal data (Lm, Cm, Rm) and amplifier data is required. These are high-Q, so it may not be noticed. \$\endgroup\$
    – glen_geek
    Commented Sep 21, 2016 at 13:22

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