The available vias are based on the DRC Layers setup. On the DRC window, go to the Layers
tab, and look for the box labelled Setup
. This is where you specify how many layers are in your design, but also whether there are any blind or buried vias too.
For a two layer board, Eagle normally uses layer 1 (Top) and layer 16 (Bottom). As such your DRC setup needs to be (1*16)
. That string means that you have a board using layers 1 and 16 {1 16
}, there is a core substrate layer between {*
}, and that there are vias that go between these layers {( )
}.
For more complicated boards like 4-layer, you might have a string like (1+2*15+16)
which indicates layers 1, 2, 15, and 16 are used, with a core layer separating 2 and 15, then prepreg layers between 1 and 2 and between 15 and 16. Finally the only available via goes from layer 1 to 16, connecting to all in between.
In your case you will instead have the string (1*2)
which means that your bottom layer would be on layer 2
rather than 16
(bottom). Simply changing the 2 to be 16 will fix the issue.
(1*16)
for the stackup. I'm going to guess that yours is(1*2)
. \$\endgroup\$