50 ohm Dummy Load With 50dB Attenuator

Question

I am designing a 50 ohm 10 watts dummy load for 100-1000MHz frequency range. The signal strength should not exceed -10dBm. The load must be able to dissipate 5 watts minimum, that is +37dBm. The output to the test equipment must be no more than -10dBm. So I need an attenuation of 47dB but to make it easy lets say 50dB.

The load consist of two 5W-100ohms resistors. After the load as you can see in the schematic picture there is 3 different attenuators. The first one is 20dB attenuator for 5W dissipation, second one is 20dB-50mW dissipation and the last one is 10dB-50mW dissipation. You can see the values of the resistors on the schematic picture.

Specification for the PCB board:

Trace thickness : 0.036mm

Substrate height : 0.8mm

Trace Width : 1.5mm for 50ohms and 0.3 mm for 100 ohms.

Substrate Dielectric : 4.3

One thing that I couldn't figure out here is the width of the tracks when routing the attenuators as you can see some of them routed with a narrow line. Should it be as thick as 50ohms or something different considering the values, I don't know this because I have never seen it before. Long story short I need help with the circuit and routing the microstrip to have a good impedance match.

Looking forward to hear my mistakes and your suggestions about it. Thank you

EDIT

I tried to change the circuit as advised and designed the PCB layout, not sure if its the way to do it.

Answer 1

There are many problems with this design.

First of all, do you really think you can maintain 50 dB of isolation with the two connectors right next to each other like that? Attenuators are generally built in straight lines for a reason, not folded around like that.

Second of all, the design of your pi-network attenuators looks fine, but you can't simply connect a couple of 100 Ω resistors across the input like that. Your resistors "1", "2" and "At1.1" are all in parallel — you need to make sure that the resistance of this parallel combination is 61.11 Ω, which would mean using two 121 Ω resistors or maybe four 243 Ω resistors.

Together, those resistors will be dissipating 80% of the input power, while the entire rest of the attenuator (mainly "At1.2", "At1.3" and "At1.4") will be dissipating only 20% of the input power. You can probably use fewer resistors here.

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As far as the trace width goes as well as the overall layout, there's no reason not to combine parallel resistors after the first stage, and you shouldn't use stubs to connect them to the signal path — just merge the pads directly with the trace.

And unless you're trying to use this in the tens of GHz range, the trace lengths are too short to worry much about exact impedances anyway — the parasitics associated with the pads and the components themselves are going to overwhelm any matching issues.

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Here's the final design, using E96 resistor values. The theoretical values for 50 Ω attenuators (calculated here) are:

• 20 dB: 61.11 Ω shunt, 247.5 Ω series
• 10 dB: 96.25 Ω shunt, 71.15 Ω series

^{simulate this circuit – Schematic created using CircuitLab}

I would arrange R3-R6 symmetrically around the input connector, keeping the current path loops as short as physically possible. Together, R2-R6 dissipate 99% of the input power, leaving just 100 mW that mostly goes into R7 (whose value is the parallel combination of two 61.11 Ω resistors).