Even with no external load, the output resistance of the differential pair is finite due to channel length modulation. The drain current in saturation depends on a drain-source voltage drop: \$I_D\$ ~ \$(V_{GS} - V_{th})^2(1 + \lambda V_{DS})\$.
UPDATE emphasizing the use of superposition principle
In the course notes (EE215A) of Samueli School of Engineering, UCLA, the lecture on Differential Amplifiers, Prof. Razavi derives the voltage gain of differential pair with active load as a product of the stage transconductance and the output resistance, \$A_V = -G_mR_{out}\$. The derivation proceeds in three steps. First, the transconductance is computed:
\$G_m = -I_{out}/(V_{in+}-V_{in-})\$. The voltages at differential inputs are \$±V_{in}\$, the output is grounded via a measuring voltage source (\$0V\$). Notice and remember the output current \$I_{out}\$.
Second, the output resistance is computed:
\$R_{out} = V_{out}/(-I_{out})\$. The voltages at differential inputs are zero, the output is grounded via a measuring voltage source. The testing voltage \$V_{out}\$ at the output is selected in such a way as to provide an output current \$-I_{out}\$. The output current here is equal to the output current of the first (transconductance) step, but flows in the opposite direction. The small-signal model circuit is linear, and you can set the output current to any value by scaling the testing voltage \$V_{out}\$ of this circuit.
Finally, we apply the superposition principle to our linear small-signal model circuit and sum up the voltages and currents obtained in the transconductance and output-resistance measurements:
As a result of this summation, the voltages at differential inputs are \$\{V_{in}, -V_{in}\}\$, the output voltage is \$V_{out}\$, and the output current is zero (\$I_{out}-I_{out}\$). The output current is zero, we can cut off the output path to ground. In the end we arrive at the solution for our small-signal model circuit where the input is \$\{V_{in}, -V_{in}\}\$ and the output is \$V_{out}\$ with a zero output current. The zero output current means that the circuit output is open, and we can calculate the voltage gain for the small signal model of an unloaded differential pair with active load: \$A_v = V_{out}/(V_{in+}-V_{in-})\$; \$V_{in+}-V_{in-}\$ is given; \$V_{out}\$ is calculated at the second step.
Other explanations of the diffpair voltage gain are possible, having their upsides and downsides. The explanation from Razavi's textbook and lectures is made in the mainstream of EE approaches to circuit analysis. It can be readily used for calculations by hand; implemented in software applications; it gives in one batch all three parameters of a two-port representation of differential pair -- transconductance, output resistance and voltage gain.
TL;DR)
At the moment I have no copy at hand of "Design of Analog CMOS Integrated Circuits", so I am looking at a copy of Prof. Razavi's lecture slides (pp. 11-12). The graph he draws for large-signal behavior indicates that he considers an "intrinsic" gain of the diffpair with active load: there is no external load in the circuit.
The small-signal behavior analysis on the same pages supports this observation: the small-signal model shows that output resistances of diffpair transistors are finite and there is no external load (no path to a "next stage"). The only shortcoming of the small-signal circuit diagram is how the ratio of voltages at the diffpair outputs is drawn: with a simple active load, the voltage at the drain node of M1/M2 is much smaller than the voltage at the M3 & M4 drains (output voltage). The circuit with a simple active load converts a differential input to a single-ended output.
The small-signal derivation of diffpair's transconductance, output resistance and voltage gain is straightforward and almost omitted in the lecture. In my answer, I use the MNA method to derive the formulas.
To verify the symbolic calculation with the help of a SPICE simulation, I assign the values to the components in this circuit (the transconductance is set to 1/10K and the output resistance, to 1MEG for all transistors). Using the circuit linearity, the signal voltage is set to one volt for convenience of comparing symbolic and numerical calculation figures.
Write down KCL equations for calculating the voltages (w.r.t. the ground) at the circuit nodes: \$V_1\$ is a voltage at the M1/M3 drain node, \$V_P\$ is a voltage at the node P (for Pair, the connected sources of M1 & M2 diff pair transistors), \$V_{out}\$ is a voltage at the M2/M4 drain node.
$$
g_{m3}(0-V_1) + {\frac {(0-V_1)} {r_{O3}}} = g_{m1}(V_{in}-V_P) + {\frac {V_1 - V_P} {r_{O1}}} \tag 1
$$
$$
g_{m3}(0-V_1) + {\frac {(0-V_1)} {r_{O3}}} = -g_{m2}(-V_{in}-V_P) + {\frac {V_{P} - V_{out}} {r_{O2}}} \tag 2
$$
where the symbols \$g_{m1}=g_{m2}=g_m, r_{O1}=r_{O2}=r_O\$ are the identical transconductances and output resistances of M1, M2; \$r_d = {r_{O3}||(1/g_{m3})}\$ is the resistance of the diode-connected M3. To measure a transconductance, the output must be (AC-)shorted, \$V_{out}=0\$. From the equation (2)
$$
V_P = {\frac {-g_mV_{in}-V_1/r_d} {g_m + 1/r_O}}
$$
Substitute \$V_P\$ into (1)
$$
V_1 = {\frac {g_{m}r_O r_d} {r_O+r_d}}·(V_{in}-(-V_{in})) \\
I_{out} = V_1/r_d + g_{m4}V_1
$$
\$I_{out}\$ is the output current; it is a sum of the current flowing from the left branch of the circuit, equal to \$V_1/r_d\$, and the current from the current source \$g_{m4}\$, equal to \$g_{m4}V_1\$. There is no current through \$r_{O4}\$, because the voltage drop across \$r_{O4}\$ is zero when measuring transconductance (\$V_{out} = 0\$).
The transconductance is
$$
G_m = {\frac{I_{out}} {V_{in}}} = -2g_{m}r_O{\frac {1+g_{m4}r_d} {r_O+r_d}} \tag {Gm}
$$
To calculate the output resistance, a testing voltage is applied at the output port. The small signal model is linear, and the output resistance is a ratio of an applied voltage to a current generated. The KCL equations with a zero input voltage and a testing voltage \$V_{out}\$ at the output are
$$
g_{m3}(0-V_1) + {\frac {(0-V_1)} {r_{O3}}} = g_{m1}(-V_P) + {\frac {V_1 - V_P} {r_{O1}}} \tag 3
$$
$$
g_{m3}(0-V_1) + {\frac {(0-V_1)} {r_{O3}}} = -g_{m2}(-V_P) + {\frac {V_P - V_{out}} {r_{O2}}} \tag 4
$$
Notice that when we calculate the output resistance, the voltage \$V_{out}\$ in the equation (4) is a given value that moves to the right-hand side in the process of solving the equations.
Add the equation (3) to the equation (4) to remove the terms containing \$V_P\$
$$
{-2{\frac {V_1} {r_d}} = \frac {V_1 - V_{out}} {r_O}}\\
V_1 = {\frac {r_d} {2r_O + r_d}}V_{out}
$$
The current flowing from the left branch of the circuit into the sensing voltage source is \$I_{out}= V_1 / r_d\$. Adding to this current a current of the \$g_{m4}\$ VCCS (\$g_{m4}I_{out}r_d\$) and a current through \$r_{O4}\$ (\$V_{out}/r_{O4}\$), we arrive at
$$
I_{out} = {\frac {(1+g_{m4}r_d)r_{O4} + 2r_O + r_d} {(2r_O + r_d)r_{O4}}}V_{out} \tag {Iout}
$$
The output resistance is
$$
R_{out} = {\frac {V_{out}} {I_{out}}} = {\frac {(2r_O + r_d)r_{O4}} {(1+g_{m4}r_d)r_{O4} + 2r_O + r_d}}
$$
Finally, you can verify these tiresome symbolic calculations: run the simulation with the circuit shown above with the component values specified, the corresponding netlist is
* LTspiceXVII\Draft6.asc
rO3 N001 M3d 1Meg
B§gm3 M3d N001 I=V(M3d)/10K
Vinput Vin1 0 0
rO1 M3d P 1Meg
B§gm1 M3d P I=(V(Vin1)-V(P))/10K
rO2 Vout P 1Meg
B§gm2 Vout P I=(-V(Vin1)-V(P))/10K
rO4 0 Vout 1Meg
B§gm4 Vout 0 I=V(M3d)/10K
Vx Vout 0 1
Vmeas N001 0 0
.op
.backanno
.end
Set the values for Vinput, Vx in accordance with the text guidance, then substitute the component values into the formulas (Gm) and (Rout) and compare the results of simulation runs and manual calculations.
