1
\$\begingroup\$

I've just started looking into DSP's. I have a few questions. We will apply Fir filter to the signal entering TMS320C6743. I want this filter to happen very fast. What does the speed of calculating the Fir filter depend on in the Dsp? Is it dsp clock? Or the speed of instruction? In which unit of the DSP are these calculations performed?

When calculating the processing rate of the filter, should I look where it says MHz? Or should I look where it says MIPS, MFLOPS?

Can you give an example for TMS320C6743?
enter image description here

\$\endgroup\$
3
  • 1
    \$\begingroup\$ Notice the stuff in between about how many additions per clock, and how many multiplies per clock. Get the code right and you can run about 8 instructions per clock total. How easy this is for your filter is another question... \$\endgroup\$
    – user16324
    Commented Dec 22, 2021 at 19:35
  • 1
    \$\begingroup\$ You may be getting ahead of yourself by selecting a DSP before knowing how much processing power you require. I suggest implementing your filter on a PC and then when it is working look at how many multiplies and adds you need. Once you know how what you are running you can use the information you posted to calculate how long your filter will take to complete. \$\endgroup\$ Commented Dec 22, 2021 at 19:54
  • \$\begingroup\$ "I want this filter to happen very fast" You need better criteria than this. Start by thinking about how many samples per second need to be processed for your task. \$\endgroup\$
    – DKNguyen
    Commented Dec 23, 2021 at 1:12

2 Answers 2

3
\$\begingroup\$

What does the speed of calculating the Fir filter depend on in the Dsp?

It depends on many factors, the clock, how fast you are sampling from the ADC, if there are memory delays, size of the filter (and implementation, like symmetric or direct which have tradeoffs vs operations and memory) ect. The implementation will also depend on how many adds/ multiplies you have. Each multiply and add operation (or there are also special operations that do both on the TI processors) also will have X amount of clock cycles per instruction. There are entire courses taught on how to calculate the filter and delay for an FIR filter on one of these processors and implement it. Probably the slowest thing will be the ADC or getting data to and from the ADC.

In which unit of the DSP are these calculations performed?

Depends on which instructions you use, the processor you have listed has six ALU's and one processor (AFAIK), the instructions tell it which processor to use.

When calculating the processing rate of the filter, should I look where it says MHz?

You can estimate the time if you know the size of the filter, if you have a 32 tap direct form FIR, you'll need about 32 delays (memory elements) and about 32 multiply-add operations. So if a multiply add takes 1 clock then it would be the clock frequency divided by 32, plus whatever the memory operations take. But at the end of the day it's really the phase of the realized filter form that matters.

So I would start by looking at the filter you want to implement, and look at the phase and tap requirements for that.

\$\endgroup\$
2
  • 2
    \$\begingroup\$ I'd like to stress what you've said: That depends foremost on the filter! "filters" don't have a fixed speed at which they all "run" on such a DSP – they're just algorithms needed to be executed, in the end, and how long that takes per input samples depends on the complexity of the algorithm. Some filters are short, so it's fast to compute the convolution with them. Others are long, but structured in a way that makes them easier to compute. Others are neither, but your convolution could be implemented in a FFT-based / overlap-add way… your filter defines what you need, the DSP just executes. \$\endgroup\$ Commented Dec 22, 2021 at 23:48
  • 3
    \$\begingroup\$ I guess the hard part for those that have never done it is spec-ing the hardware, but you have a long uphill battle if you have never made a filter and you need to implement one on new hardware. \$\endgroup\$
    – Voltage Spike
    Commented Dec 23, 2021 at 0:41
1
\$\begingroup\$

Welcome, You ask:

What does the speed of calculating the Fir filter depend on in the Dsp?

  • Is it dsp clock?
    Yes
  • Or the speed of instruction?
    Yes
  • In which unit of the DSP are these calculations performed?
    Depends on which DSP you use When calculating and software when determining the processing rate of the filter.
  • should I look where it says MIPS, MFLOPS?
    That may help. The primary part that controls the speed (throughput) of your FIR filter is the software and how it is organized. You have two multiply units how you use them will have a big impact on throughput. Fixed point or floating point change things a lot. The most important thing is experience, you get that by trying different programs and see how things change as code change.
\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.