Looking at the internal diagram of LM324:
I see that the output of the the input stage, which is a differential pair, is single ended rather than being a differential output.
How does then this input stage block common mode signals? As I understand it, in differential output, since common mode signal is present in both outputs, the difference becomes zero, which is not the case for a single ended output.
If you look carefully, you will notice that the collector loads of the differential pair (quad?) are a current mirror (Q8, Q9). Whenever you have that combination of a differential pair with a current mirror as the collector loads, you have a transconductance amplifier. The output current (not voltage) is to a first approximation, proportional to the differential voltage input, and is fairly independent of the common mode voltage input. If the differential input voltage is 0, the output current is (to a good approximation) 0. If the inverting input has a slightly higher voltage than the non-inverting input, then current will flow in one direction. If the inverting input has a slightly lower voltage than the noninverting input, then the output current will flow in the opposite direction.
This accounts for the high CMRR in the output of the first stage, even though the output is "single-ended". The trick that is then needed is to convert this current signal back into a voltage signal. This is not trivial because the when the current flows in one direction, some transistor(s) will be in cut-off, and when the current flows in the opposite direction, different transistor(s) will be in cut-off.
Here is a simulation made with discrete transistors. The output is connected to a fixed ideal voltage source, and the current through that voltage source is the parameter we are interested in. The input is driven with a common mode signal of +/- 2V (centered around 5V) superimposed upon a differential mode signal of +/- 2 mV. Despite the common mode input being 1000x larger than the differential mode input, the output current tracks the differential mode signal quite well, while some common mode effects are visible as a small "beat". Hopefully a IC does a little better than my circuit made of discrete components. Note that in my simulation, since the output of the transconductance amplifier is feeding a voltage source, the current is not symmetric about 0. Unfortunately, I couldn't think of an easy way to ensure that the output was in the compliance range other than a voltage source, which obviously has it's own influence on the output current.
simulate this circuit – Schematic created using CircuitLab
Why does this op-amp input stage have single-ended output?
Generally, we don't use op-amps with differential outputs.
However, the first stage has a great influence on some "internal" variables (all offsets ...).
So, we use differentials (and a balanced system) at least for the first stage which has the most "big" gain, the other stages are for "power" and "adaptation".
Here are two pictures, one for the Common voltage, and the other for the differential voltage at inputs.
See the relative value of gains ( ~ 1 vs ~ 1000).
As I understand it, in differential output, since common mode signal is present in both outputs, the difference becomes zero, which is not the case for a single ended output.
Indeed, historically this was the first way to eliminate common mode input signals in a simple "long-tailed pair" with a common emitter resistor. But it had a significant drawback - although the difference between the two collector voltages was constant, they themselves changed significantly.
In addition, the differential output signal eventually had to be converted to a single-ended.
That is why, they have devised a clever trick to replace the static emitter resistor with a dynamic resistor ("current source"). It changes its resistance Re in the same direction and rate as the common-mode input voltages Vin so that the current I = Vin/Re remains constant. As a result, both collector currents do not change at common mode.
Now, at common-mode input signals, not only the difference between the two collector currents (voltages) stays constant, but both currents (voltages) stay constant.
You are right, the differential stage has a single ended output that does change somewhat with common mode input changes. However this component is so small compared to the output's response to input difference, that we mostly don't care about it. It's not obvious why, so let me explain.
Total common mode rejection implies that as long as the inputs have the same potential, the output remains unchanged, and as both inputs rise or fall equally, that output stays rock solid at some value.
You might expect that value to be zero, since the typical control systems book will explain that the input-to-output relationship of an opamp is something like:
$$V_{OUT} = A \times (V_{NINV} - V_{INV})$$
Here \$A\$ is the opamp's open loop gain, of course. To be more complete, That equation should really include offsets at the input and output, that reflect some deviation from the ideal:
$$V_{OUT} = A \times (V_{NINV} - V_{INV} + V_{IN\_OFS}) + V_{OUT\_OFS}$$
In that right hand expression, as \$A\$ goes towards infinity, \$V_{OUT\_OFS}\$ becomes negligible compared to \$A(V_{NINV} - V_{INV} + V_{IN\_OFS})\$. It remains small, dwarfed by the huge value of the differential component multiplied by \$A\$.
By contrast, the value of \$V_{IN\_OFS}\$ still gets amplified by factor \$A\$, always being a significant component of the output, meaning that input offset is a big deal when building circuits with opamps.
The effects and consequences of input offset voltage is always well covered in the books, precisely because of its significant effect on the output voltage. Output offset voltage, on the other hand is frequently overlooked, simply because its influence is tiny compared to everything else.
Consider that any common mode component that makes it through to the output is what I refer to by the term \$V_{OUT\_OFS}\$. As I said, it is going to be tiny compared to the heavily amplified differential part. As long as gain \$A\$ is huge compared to whatever gain is applied to the common mode component, the real behaviour of the opamp will be very close to that of an ideal device:
$$ \text{for A >> B} \\ A \times (V_{NINV} - V_{INV}) + B \times V_{OUT\_OFS} \approx A \times (V_{NINV} - V_{INV}) $$
This is why you don't really need to completely reject the common mode component of the inputs to a differential pair. To put this idea into some context, consider the voltage follower, a non-inverting amplifier and an inverting one:
simulate this circuit – Schematic created using CircuitLab
Algebraically, all of these configurations make use of the opamp gain expression in their analyses, but with some qualitative analysis, we will be able to see intuitively how any output offset, introduced anywhere in the system, may be ignored. These systems all rely on negative feedback, where we feed some fraction of the output (X) back to the inverting input (Q).
Any rise in output X, causes a rise at inverting input Q. If X is not exactly the right value to make P and Q equal, X will change, as per the gain expression, in a direction that will reduce the difference between P and Q. If P is greater than Q, X will rise until Q becomes equal to P, and vice versa.
In other words, negative feedback causes output X to slew in the direction necessary to equalise inputs P and Q. If it over shoots that mark, the difference between P and Q changes sign, and the opamp reverses the direction of change of its output, always eventually settling at the state where P = Q. This all happens pretty much instantly.
Notice that at no point do we care what the current value of X is, because the opamp will always adjust it towards that point of equilibrium where P = Q. It doesn't matter if there's some offset present at X, the opamp's high gain will cause X to change in such a way that minimises the difference between P and Q, effectively compensating for that offset, rendering it moot.
This brings me back to your question about the differential stage failing to reject the common mode component of its inputs, and feeding that component through to its single-ended output. You are not wrong. That can and does indeed happen. In fact, that common mode component may even be amplified somewhat by subsequent stages, and appear at the output of the entire opamp, but it doesn't matter. The effect it has on shifting the output up or down is so small compared to the huge shifts that result from the tiniest difference in input potentials, that it is negligible in all but the most demanding applications.
Why does this op amp input stage have single ended output?
The entire point of an op-amp is to compare two signals and produce a single comparison result.
How does then this input stage block common mode signals?
The constant current source (6μA) does that. It forces the sum of left and right collector current to be constant. It pinches off both input transistors in the same way by raising or lowering emitter potential, thereby removing common-mode current with no impact on differential collector currents.
The components of the input stage are:
A Darlington pair, acting as a single-ended voltage-to-current amplifier for the negative input.
A Darlington pair, acting as a single-ended voltage-to-current amplifier for the positive input.
A shared constant current source that supplies both Darlington pairs and provides common-mode rejection for their output currents (as described above).
A current mirror that turns the differential currents into a single-ended output current. By Kirchhoff's laws, the sum of currents (right input current, mirrored left input current, output current) at the output node is zero. In other words, the output current is the difference between the two input currents.
