I am doing a spice simulation to characterize the switching behavior and switching losses for MOSFET I want to use in my three phase inverter application.
I am using a 60 V, 3 mΩ Si MOSFET from ONSEMI NVMFS5C628NL. The gate driver I am using is 100 V/4 A half bridge gate driver from Texas Instruments UCC2721x.
The operating condition for my inverter is 24 V DC voltage and 40 A hence I used a load inductor which will be magnetize till 40 A during first pulse so I choose the width of first pulse as 28 µs by simply using formula V=L*i/t with 17 uH as load inductor.
All the components used in schematic are spice models including gate and pull down resistors, DC link capacitor, bootstrap capacitor and bypass capacitor for the gate driver power supply as well as 40 V 1 A Schottky diode.
Using Texas application notes, I calculated the value for my bootstrap capacitor as 155 nF, but considering the parasitics of the real PCB I used a 470 nF 25 V ceramic capacitor. For vthe alue of bypass capacitor for driver Vcc, it is recommended to use 10 times the bootstrap capacitor value hence I use 4.7 µF 25 V ceramic capacitor and since the bootstrap diode is integrated in the gate driver I directly connected HB with VSS via the bootstrap capacitor.
The problem I am having is this extreme spike I am getting at turn on of MOSFET which has three times higher drain current at that time surpassing absolute maximum current capability of this MOSFET which is 120 A. I also added 1 nF with 8.2 Ω snubber but still no impact. I even increased the gate turn on resistor to damp this transient but still this spike is always there. Can anyone please suggest a solution to overcome this?
Below are screenshots of my schematic and waveforms.