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The Design on proteus

This is my design for a 2-digit adder-subtractor BCD circuit. The design performs well with addition, but for subtraction, it calculates 33 - 73 = 60, which is incorrect. Can anyone help me figure out the issue?

I’ve used a 74LS83 IC along with a bunch of XOR gates, AND gates, NOT gates, and a 7-segment display to show the output. The design was implemented using Proteus 8 Professional.

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  • \$\begingroup\$ 60 is correct modulo 100. \$\endgroup\$
    – greybeard
    Commented Nov 24 at 13:27
  • \$\begingroup\$ So what do you expect the result to be if it is now incorrect? \$\endgroup\$
    – Justme
    Commented Nov 24 at 13:29
  • \$\begingroup\$ @greybeard i do not understand can you explain a bit more \$\endgroup\$
    – shahd
    Commented Nov 24 at 13:36
  • \$\begingroup\$ @Justme it is supposed to be -40 \$\endgroup\$
    – shahd
    Commented Nov 24 at 13:37
  • \$\begingroup\$ The difference between -40 and 60 is -100. Numbers an integral multiple of a "modulus" m apart are called equivalent, even "equal modulo m". (You can consider 60 the "ten's complement" representation of -40.) \$\endgroup\$
    – greybeard
    Commented Nov 24 at 13:43

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There are many bugs in your circuit, but there is a particular one that's preventing the "tens" output complementer from operating.

First of all, you should show reference designators for all of the parts in your schematic — otherwise, it's very difficult to talk about details.

There's an AND gate in the lower right quadrant that controls whether the "tens" output complementer is activated. Note that its inputs are the true and complemented versions of the same signal. Therefore, its output will always be false.

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