How to adjust this circuit to use N-Mosfet instead of P-Mosfet

Question

Background information

(You can skip this part if you just want to answer the question by heading straight to the "The Question" paragraph)

I'm a hobbyist in electronics and a professional programmer. I want to learn more about electronics and I decided to design a simple switching mode power supply (see the circuit below), solely for the purpose of gaining more hands on experience and feeling with electronic components. Of course I could buy a SMPS IC that does the magic for me, but I wouldn't learn much from it that way. I've a 2-channel oscilloscope by my side (up to 1MHz) to facilitate me on my journey.

The circuit is working, although not optimal. But good enough for the fun of it. By my surprise, the signal to the gate of the P-Mosfet shows actually a block wave! When I replace the 10K restistors in the Driver Circuit with significantly lower values, the gate of the P-mosefet isn't driven with a block wave anymore. So I guess its due to the limited switching speed of the driver circuit (consisting of Q1, Q2 and Q3).

L1 is meant to limit the peak currents when P-Mosfet is conducting. C4 is meant as the buffer cap when powering the load. L1 is seemingly doing its job as the voltage at C4 (and the load) only reaches ½ of 16Vdc. So it seems the 555 @ ~50DC is a limited factor here. But thats alright, as long as I know where the 8V limit on the load comes from! In this circuit I could possible not use the 555, and have no Duty Cycle, but still have a 'working' regulated SMPS (may I even call it like that?). And I should replace the LM2904 with a comparator instead of an OP AMP. But does it really matter as the switching speed is already delayed by Q1, Q2 and Q3?

Blue is the signal on the gate of the P-Mosfet. Yellow is the voltage on the load. The circuit was driving a small universal motor when this screenshot was taken. As you can see the ripple on the voltage on the load is quiet high (1.04Vpeak-peak) but the P-Mosfet (Q4)'s gate is driven with quiet a nice regular block wave.

Blue line is the Gate of the P-Mosfet. The Gate is driven on/off in 1.2uS. Is that fast enough? THe yellow line is the voltage on the load. Oh and yes, not to be forgotten: after ~10 minutes of action the passive heat sink (exactly this type: http://nl.farnell.com/jsp/search/productdetail.jsp?SKU=4621311) attached to Q4 doesn't seem to have become any warmer at all while the voltage on the load was < 1 Volt. So 'dropping' ~15Vdc from the PSU to the load! So the lowering of the voltage on the load is really done by the switching and not by the resistance in Q4.

The question

How can I replace the P-mosfet with an N-mosfet in this circuit? I was thinking about adding a charge pump up to 30Vdc or so (something like http://i210.photobucket.com/albums/bb292/frequencycentral/555ChargePump80-1.jpg) with a 14.5volt Zener diode to drive the N-mosfet gate. I tried, but when I connected the 30Vdc to the gate, it collapsed to the upper rail voltage of ~16Vdc, even while the voltage at the N-mosfet's drain was ~15Vdc (maxed out). I still do not understand how the Mosfet was conducting as the Vgs was now less than two volts or so!

Answer 1

D1 is in the wrong place (on the circuit diagram at least) - it should be on Q4's drain and then to ground/0V - sort this out, let us know what happens and consider using fewer words to get a better response - I read this a while back and lost the will to survive, entered a coma but recovered a few minutes ago!!

Honestly dude - stick to the business and you'll get better answers (and a bit quicker too).

Trying to get an N channel working can be tricky given the supply bootstrapping required. I think you should try something else first (and this will potentially teach you more about this type of circuit). This would be a natural progression in my book....

At the moment, I think your regulation technique works by pulse skipping i.e. when the output voltage is high enough (despite the diode in the wrong place), you kill pulses on their way to Q3 by shorting its gate with Q2. Instead, try setting up the 555 to have a variable duty cycle (instead of fixed) and avoid pulse skipping - variable duty cycle will give better ripple voltage and I think it's more important than trying to replace the P channel with an N channel - there are plenty of buck regulators using a P channel for Q4. OK maybe Linear tech tend to use N channels on a lot of devices (with bootstrapping) but it's no shame using a P channel and building from scratch.

There are of course, plenty of bucks that do use pulse skipping but better performance is from PWM/duty cycle modulation. If you get that going then try using an N channel FET to replace the flyback diode (D1, the one that appears to be in the wrong place on the circuit). That gives you a synchronous buck converter and better efficiency.

If I've misread your diagram, don't be shy, tell me (in few words but with accuracy).