Question: Does this actually "superimpose" v_i on V_BE
For fig:1 , you just add two voltage source in series.Is there any reason not to be superimpose? I don't think so.
For fig:2 , if you consider the coupling capacitor then when you consider DC voltage, for DC voltage coupling capacitor act like open circuit. So you get a fixed voltage at node X . And then if you consider for V_i ( assuming it is small signal analysis ) then for small signal , coupling capacitor act like short circuit and so a voltages came from V_i . But from node X , the circuit only sense the equivalent circuit. So it sees a small change of it's fixed voltage which gives a situation like your fig:1 for voltage at node X. So it also superimposed.
But if signal from V_i is not that small then behavior of capacitor (impedance , open or short circuit etc ) depends its signals characteristics and make the calculation for the voltage at node X a little more clumsy. But This also superimpose .