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I am working on Xilinx virtex 4 FPGA. I want to store some filter coefficients in Block RAMs.
Specifically, I have many sets of filter, each set having 64 coefficient, each coefficient is of 18 bits. Each set has to be mapped on a distinct Block RAM.

From the Virtex 4 user guide (link to pdf), it says a Block RAM stores 18Kbits of data which can be configured in any “aspect ratio” from 16Kx1, 8Kx2, to 512x36.

So, if I program the Block RAM to have 512 coefficients, then I have 36 distinct Block RAMs at my disposal.

My question is, can I scale this aspect ratio down so that I program the Block RAM to store 64 coefficients, in which case I will have 288 distinct Block RAMs at my disposal(64 x 288 = 18K)?

If the answer is NO, then how should I store my coefficients so as to use minimum Block RAM resources?

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No, you have misunderstood the concept of "aspect ratio".

Each chip has a fixed number of block RAMs in it; you can find this number in the datasheet.

Each of those block RAMs holds 18K bits, and can be configured to access those bits in a number of different ways, from 16K words of 1 bit each, to 512 words of 36 bits each. In the first case, you can read or write one bit at a time; in the latter case, you can read or write 36 bits at a time.

For your filter coefficients, you'll probably want to configure the block RAM as 1024 words of 18 bits each. You'll be able to have one filter for each block RAM in your device, and you'll be "wasting" most of the capacity of each block RAM.

There are a few tricks you can try to support more than one filter per block RAM:

  • If the addressing for all of the filters runs in lock-step, you could configure the block RAM as 512 words of 36 bits, and then split the 36-bit data bus into two 18-bit busses, sending the data to two separate filters.

  • If you don't otherwise need the dual-port feature of the block RAMs, you can use the second port to feed a second filter. Tie the address MSB low on one port and high on the other.

  • If both of the above conditions apply, you could conceivably use both techniques together to hold coefficients for four filters in each block RAM.

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  • \$\begingroup\$ Thanks for clearing that up. So u are saying that I should declare my RAM as reg [35:0] RAM1 [511:0]. Then store 2 sets of filter coeff from 0 to 63 & another 2 sets of filter coeff from 256 to 319 by negating the MSB of address. So this is the most optimum way right? Because I am still not making use of the remaining 256 locations right? \$\endgroup\$ – KharoBangdo Jul 24 '14 at 4:16
  • \$\begingroup\$ Another followup question is, cant I reduce the aspect ration down to 64 x 288? Because in this case, I can store 16 sets of filter coefficients thereby using the full RAM locations. Does Virtex 4 allow this aspect ratio? \$\endgroup\$ – KharoBangdo Jul 24 '14 at 4:19
  • \$\begingroup\$ No, 512x36 is the widest aspect ratio that the hardware supports. In order to use more of the remaining memory, you would have to double-clock (or more) the RAMs with respect to the filters. \$\endgroup\$ – Dave Tweed Jul 24 '14 at 11:16

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