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My project is a data logger board which must mount a PIC of some kind to provide USB and Ethernet as a means to communicating with the board. I can develop this system into two products a low-end version which provides 10Mbps (10BaseT) and a more featured one which must provide 100Mbps (100BaseT) for compliance with LXI (LAN eXtension for Instrumentation).

For the low-end version I use

PIC18F97J60

This part offers the path of least resistance. I get everything in one chip including the PHY layer. I just need to add magnetics and use the free MICROCHIP TCP/IP stack in the firmware to get the job done. However, this provides 10Mbps (10BaseT) only and the product based on this solution cannot be LXI compliant.

For the more featured version I want to use a suitable member from

PIC32MX

With the PIC32MX I could use one of the following PHYs

  1. LAN8720A/LAN8720Ai
  2. ENC424J600/624J600
  3. LAN9220, LAN9221 or similar

In a few words what are the main differences and use cases between these PHYs?

Is there a member of the PIC32MX family that is equivalent to the PIC18F97J60 by offering MAC and PHY all integrated in one chip?

Thank you for your help

Regards

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    \$\begingroup\$ It's generally easier to use a single board computer running a full os (e.g. raspberry pi, beagle bone) that it is to get ethernet working nicely on a micro. Using a cut-down, non-standard IP stack is generally a bit of a pain \$\endgroup\$ – Will Dec 30 '14 at 11:45
  • \$\begingroup\$ Just get a chipKIT MAX32 and it's associated Ethernet shield. \$\endgroup\$ – Majenko Dec 30 '14 at 17:07
  • \$\begingroup\$ Thanks for your suggestions Will and Majenko I'll keep them in mind. However, for this project I must stick to an existing board which is going to be appropriately upgraded with a PIC18F97J60 for the low-end version and with PIC32MX + some other PHYs or a PIC32MX with integrated MAC & PHY if it exists. \$\endgroup\$ – D76X Dec 30 '14 at 19:42
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As far as I know there are no 32-bit versions of the PIC18F97J60 chip. I believe Luminary Micro (now TI) did have one, but I am not sure if they are still available (I think I read somewhere they went EOL).

The ENC424J600/624J600 chips provide MAC+PHY in 1 chip, and communicate via SPI or parallel interface to any microcontroller. However you need to haul all of the frame data over this SPI/parallel interface. The SPI interface can only run at 20MHz or so, so the SRAM buffer will overflow at medium to high throughput. It's nice the chip can communicate on 100Mbps networks, but it cannot sustain that data rate. To avoid this you could run the interface via parallel (that can transfer up to 80/160Mbps between MCU and Ethernet controller), but that will involve a dozen or more connections between the chips.

The LAN9220 chip looks very similar to the ENC624J600, but only supports parallel.

I would suggest looking into the "MII/RMII Phy chips" if you can specify one of the higher-end PIC32MX6xx or 7xx series chips (or alternative ARM part). They include the MAC controller inside the microcontroller, with frame buffers allocated inside your MCU RAM. You only need a cheap external PHY chip, which basically translates the MAC data to compliant Ethernet signals. Best of all, RMII/MII is not exclusive to Microchip. Many ARM microcontrollers support RMII/MII ethernet interfaces as well. The biggest advantage is that the major data movements are all handled by hardware or DMA. Once the software/ethernet stack is prompted about a new packet, it's already in the MCU RAM ready to be processed. This yields very decent/good throughput and the lowest latency of the bunch.

MII is basically two seperate 4-bit data busses running at 25MHz. You just tie them together to the MCU and off you go. RMII halves the 4-bit bus to 2-bit (less signals), but runs at 50MHz.

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The best way to see the difference is to view this chart in the Microchip TCP/IP Stack Help. I cannot say where this is in the newer versions of the MAL, but in v2012-10-15, it can be found in C:\Microchip Solutions v2012-10-15\Microchip\Help\TCPIP Stack Help.chm. There is a nice chart under Release Notes->Stack Performance. The MAL can be found here, including the archives.

In short, here are some basic LAN UDP max througputs (Kbytes/sec).

PIC18F97J60 = 113

PIC32MX795F512L + ENC624J600 = 784

PIC32MX795F512L + DP83848 = 8449

The DP83848 is a phy from TI, which is going to act similar to the lan8720.

The Lan9220 appears to be somewhat equivalent in action to a encj624 series, as it is a mac + phy, but much faster perhaps.

All pic32mx series only have a mac. Don't let this dissuade you from using a separate phy, as there are logical reasons to have them separate. The integrated mac+phy combinations on the PIC18's don't always have an easy time meeting FCC part 15 emissions standards, for example.

The MAL stack from microchip is nice to use with good docs, if you already are using the PIC18F97J60 you probably won't have too hard a time upgrading to any MAL supported configuration.

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