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I am currently working on this small circuit which as you can see, has to level shift a 3.3v 1Hz PPS signal into a 5v pulse.

schematic

Everything is marvelous when I measure the level shifted pulse with the CRO leads with ground springs (rather than leads) right off the CMOS gate.

enter image description here

However, this design is going to carry the output pulse from my PCB to the destination using some loose wires (Not a shielded cable which doesn't get effected).

schematic

simulate this circuit – Schematic created using CircuitLab

And these loose wires introduce the following coupling effect to my design.

enter image description here

How I know this? In my 3D electronics version, I have added a bunch of zip tied loose wires to my signal, ground and Vcc wires (exactly how the final product is going to be) and measured the signal at the end of loose wires with the perfect CRO leads with spring grounds.

Wanna make it harder for you? I cannot use heavy filtering on the input or output pulse as this device is used for a time measurement and correction purposes with a 300ns rise time limit, so we wouldn't want to slow down the rising time.

How can I prevent this coupling from happening while using loose wires to carry the signal?

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    \$\begingroup\$ Use a x10 probe on your scope. \$\endgroup\$ – Andy aka Nov 12 '15 at 23:42
  • \$\begingroup\$ My problem isn't a measurement issue as I stated. I am going to use loose wires (which are potentially acting like an imperfect CRO leads and they are fixed in the design) and I need to prevent this coupling from happening even when I am not measuring the signal. \$\endgroup\$ – Mehrad Nov 12 '15 at 23:50
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    \$\begingroup\$ You've lost me on this question. Thought I was with it but I guess not. \$\endgroup\$ – Andy aka Nov 12 '15 at 23:51
  • \$\begingroup\$ No problem, I have done same major changes to the question so there is no way to be confused. Cheers \$\endgroup\$ – Mehrad Nov 13 '15 at 0:55
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    \$\begingroup\$ Possible cause 1 - coupling through poor supply - add decoupling cap. Possible cause 2 - slow input rise time - add schmitt trigger to input. Zener diode is a poor regulator and wastes power. 3-terminal regulators are cheap enough, use one. \$\endgroup\$ – rioraxe Nov 13 '15 at 2:57
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Your horrible noise could be grossly underdamped LC ringing .You cant up the C because you have to keep fast rise time .If you place Resistance in your circuit you should be able to damp out the oscillations .More resistance lowers the Q so why not start with 100 ohm.Keep increasing to see your waveform improve.Twisting all the loose wires will help too .The reason that the coax worked well is because the cable has very very low inductance .In fact the effective output resistance of the logic chip was probably enough to damp the wave. The now old HCMOS had an output resistance that would ballpark into 50 ohm quite well . Newer logic with lower on resistance output mosfets which can drive more current would be happy into cable impedences that nobody makes.

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