You can derive a maximum capacitance from thermal considerations (from your datasheet):
Absolute Maximum allowable dissipation is 500mW at up to 70°C (again, from the datasheet), so maybe we don't go quite that far- say 250mW.
Which gives us \$C_L(\text{max}) \approx \frac{250000}{n\cdot Vcc^2 \cdot f_o}\$
where n is the number of outputs loaded
so if n = 4 and Vcc = 5.1 and fo = 1MHz Cl(max) is about 2.4nF.
Of course the rise and fall times under these conditions will be greatly extended, but the chip should survive, at least for a while. I would be somewhat concerned about long term reliability since there are failure modes that are related to the current passing through internal conductors on the chip.