I recently came across the Bit-banding feature on Cortex-M4 core and how it provides a solution to avoid race-conditions while toggling bits of registers. The M4 also has a dedicated BSRR register for performing atomic bit manipulation on the GPIO ports,I understand that using this makes the application thread-safe
Is there any downside to this approach compared to the generally used Read-Modify-Write method of toggling GPIO pins.If not, then why are GPIO_ODR registers provided for the cortex-m cores, why not use only the BSRR register for GPIO pin access.