I am just experimenting with flip flops and am pretty confused about alternating between two clocks. Right, so I want a pulse to be sent to a flip flop first after 18 seconds and then after 2 seconds and then again after 18 seconds.

For this purpose, I have made two 555 timer ICs which generate 18s and 2s pulses respectively. What I have been struggling to do is to, after the 18s timer IC generates a pulse, activate the 2s timer IC and deactivate the 18s timer IC and after the 2s timer IC generates the pulse, I would like to deactivate it and activate the 18s timer IC.

What I want? I want the flip flop to get a pulse after 18seconds, then after 2 seconds, then after 18 seconds and then 2 seconds and so on.

Any help would be greatly appreciated.

  • 4
    \$\begingroup\$ Safely switching between two asynchronous clocks is a complex process. I think it would be easier if you use a 2 sec clock and add a circuit which makes from that a pulse after 9, 1 and 9 'clock' pulses. \$\endgroup\$
    – Oldfart
    Apr 29, 2018 at 19:09
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    \$\begingroup\$ Your requirements are hidden by the attempt to explain a possible solution. Forget any possible solution and state what you require and not what you think might work. \$\endgroup\$
    – Andy aka
    Apr 29, 2018 at 19:13
  • \$\begingroup\$ @oldfart I am sorry, I couldn't quite understand that. Can you please rephrase it. I'll be much obliged. \$\endgroup\$
    – user187352
    Apr 29, 2018 at 19:19
  • \$\begingroup\$ @ParkerQueen The clocks are not linked together, so they will drift apart and bear. Think about direction indicators on two cars. The suggestion is just to have \$one\$ clock, and then have a counter which gives out a pulse every 1 then 9 pulses from this single clock. \$\endgroup\$
    – awjlogan
    Apr 29, 2018 at 19:51
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    \$\begingroup\$ @ParkerQueen easiest (and best!) solution is to just use the lowest common denominator of your two durations. 17 and 3 are both prime, you'd have a 1 Hz clock and then trigger on 3 then 17. Actually quite a fun exercise in digital design :) Basically you generally want only a single clock in your circuit (for quite a few reasons beyond this example). \$\endgroup\$
    – awjlogan
    Apr 29, 2018 at 19:59

1 Answer 1


Probably, the most simple way to produce the clocking signal you need is to produce a single clock \$Q\$ with a period of 20ms and a 90% duty cycle: by inverting such clock (for example by using a NOT gate or a single fast transistor inverter) you will get another clock \$\overline{Q}\$ with the same period but with a 10% duty cycle. Each of this waveform is shown below:

enter image description here

Then, the original clock signal will provide the 18ms pulse, while the inverted one will provide the 2ms, for example by ORing the outputs of the following simple RCD trigger circuit:


simulate this circuit – Schematic created using CircuitLab

By calling \$t_1\$ the trigger generated by feeding \$Q\$ to the input the of the above circuit and \$t_2\$ the one generated by \$\overline{Q}\$, these signals have waveforms similar to the following ones:

enter image description here

And ORing the two triggers you'll get the following composite one:

enter image description here

A few notes

  1. You can use one 555 to generate \$Q\$ and then inverting its output: however the simplest way is perhaps to generate both \$Q\$ and \$\overline{Q}\$ by a single, properly designed, astable multivibrator.
  2. The RCD trigger circuit show above is simply an analog differentiator: \$R\$ and \$C\$ control the duration of the trigger pulse, while \$D\$ rules out the negative pulse which would otherwise appear during the falling of the input squared wave signal.
  3. This is an hybrid analog/digital solution to your problem: if you need to work with only logic gates, perhaps the solution to which awjlogan alludes is the best.

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