VCVS in LTSpice Operating as a Comparator

Question

I am using a VCVS in LTSPICE.

I am confused about the command in the Spiceline for using a Table.

I want to use the VCVS as a 1 bit Comparator instead of making a transistor based one.

What will adding the following spiceline for a VCVS in LTSpice do ?

table=(-0.5 0, 0 0, 1.0e-6 1, 0.5 1)

Will it set the output to 0 when the VCVS is input with -0.5, 0 output when it gets 0, 1 output when it gets 1u and one output when it gets 1?

Is this correct ?

Thanks.

Answer 1

Your requirements are a bit odd: you want zero output for -0.5 input, and basically 1V output for anything above zero (1u) input? What do you want to have in between? Linear interpolation? abrupt change in the middle? Hysteresis?

If you're using LTspice, then the best option readily available as a comparator is using the A-devices, in [Digital]. The simplest is the AND, or BUF, with ref=<...> being the threshold voltage, and with td, tripdt, and one of trise+tfall, or tau, or rout+cout, being the temporal aids for the waveform. SCHMITT triggers ar a bit more versatile in that they allow a threshold, vt, and a hysteresis, vh.

You could use a VCVS, or VCCS with proper termination (for better convergence, as per the manual), but table() is a linear interpolation of points, bringing possible discontinuities, which means you risk time step too small errors.

Here are the few presented options:

A1 is a BUF, so it uses ref as the reference and tau for smooth RC output, A2 is AND and uses the same ref, with trise/tfall for linear ramp output, A3 is a SCHMITT (use DIFFSCHMITT for differential input), so it uses vt for threshold and vh for hysteresis, while rout/cout control the smooth RC output.

G1+C1 form what you had in mind but, as you can see, it's limited: it needs a minor hysteresis, which needs to be very small compared to the swing, otherwise it linearly interpolates and you get the nice pink waveform, it has no complementary outputs (like the others before), and it needs a sort of a time constant at the output to help smooth out the discontinuities. All in all, you get two elements + two nodes, with drawbacks, compared to one element + two nodes[*] with improvements. Hardly a choice.

[*] If you're using the complementary outputs, then you have one more node, but then, for the G+C version, you also need an inverter of some sort, so you add not only a node, but one more element (at least).

Having said these, for your solution it looks like you need a SCHMITT gate, with vt=-0.25 vh=0.25 (vhigh and vlow are 1 and 0 by default), but this is assuming you want hysteresis. If you want linear interpolation, G+C is the way to go. If you want an abrupt change in the middle, then go for BUF or AND, with ref=-0.25.