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I am tasked with the objective to design a photoelectric sensor. Being very weak on amplifiers & control theory, I am working on the basics of op-amps. Following this reference design by TI, I learned that feedback capacitors are important for stability of photodiode amplifiers.

However, the calculation of capacitor value is ambiguous (Section 2.3):

The feedback capacitor, in combination with the feedback resistor, forms a pole in the frequency response of the amplifier:

𝑓𝑃=1/(2𝜋𝐶1𝑅1)(4)

Above this pole frequency, the amplification of the circuit will decline. The maximum feedback capacitor value can be determined from the feedback resistor value and the desired bandwidth:

So it uses the intended bandwidth to calculate the max. value of capacitor, but what about the minimum value? This calculation doesn't tell me if the calculated value is enough for stability. What is the method of calculating minimum feedback capacitor for stability?

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Lets approach this (stability) question another way.

The photodiode has some capacitance. That Cdiode in conjunction with the feedback resistor, forms a delay and also a phaseshift and a pole.

1) the circuit already is inverting, thus provides 180 degrees

2) the Cdiode + Rfeedback is another 90 degrees (above some frequency)

3) the opamp provides another 90 out near its Unity Gain BandWidth

4) the opamp will have less than 90 degrees phase margin at its UGBW, thus an extra 10 or 20 or 30 or 40 or 50 degrees phaseshift (delay) you don't want

5) however, there is a (useful, in your favor) parasitic capacitance across the Rfeedback, inside the resistor and between the solder terminals and between the solder pads on the PCB

If you can quantify these, and you chose a phase margin for the acceptable overshoot, then you can compute the (extra, lumped) Cfeedbach to compensate.

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