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I read since a long time but never had an account, now its my turn to ask a question on here:

I have an idea but currently unsure if that works technically or if it is good design:

1st (Top Layer) : SMD Devices + Routing

2nd Layer : Ground Plane (only Ground)

3rd Layer : Thermal Plane

4rd Layer : Thermal Plane + THD Connections.

So all of my devices are SMD, apart of a few connectors which are THD.

The 3rd and 4rd Layer are only copper planes which are connected to a heat/cold source to regulate temperature of whole PCB. Obviously I will need vias which go only from 1st Layer to 2nd (to ground). Is that maybe too expensive to manufacture?

I am only concerning about my connectors: the pins are soldered on the bottom. Normally THD are like vias, so it also has a connection on the top layer. Which I can connect then to a local ground plane which goes with vias down to the 2nd Layer.

Is that alright?

Maximum Frequency will be about 90 MHz.

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  • \$\begingroup\$ What's your personal idea for what THD means? \$\endgroup\$
    – pipe
    Commented May 1, 2020 at 15:16
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    \$\begingroup\$ @pipe I assume in this context it's "through-hole device". Either way what the OP is asking about seems to be the cost of blind vias, but I think the OP is missing the point that a via can (more specifically, usually does) go through a layer without connecting it. \$\endgroup\$
    – Ron Beyer
    Commented May 1, 2020 at 15:19
  • \$\begingroup\$ Hi. Two comments. First is, how can the 3rd layer be a "thermal" layer. It's going to have another layer on top of it, so it's not going to be a very effective thermal layer. Second is your 90Mhz. Is that the system clock? If so, your actual frequencies of concern are MUCH higher. A 90Mhz square wave has significant frequency content into the gigahertz. You need to take high-speed routing concepts into account IMO. Do you have experience with that???? \$\endgroup\$
    – Kyle B
    Commented May 1, 2020 at 15:50
  • \$\begingroup\$ Well the idea was that the 3rd&4th Layer are filled with a copper plane, which is connected to a a heat/cold source. It is actually 90 MHz Sine Wave \$\endgroup\$
    – Jeres
    Commented May 1, 2020 at 16:03
  • \$\begingroup\$ Is there a reason the thermal planes can't be electrically grounded? Or at least one of them, if you want to keep them thermally isolated from each other. \$\endgroup\$
    – The Photon
    Commented May 1, 2020 at 16:32

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Obvisouly I will need vias which go only from 1st Layer to 2nd (to ground). Is that maybe too expensive to manufacture ?

This is called a "blind via" and they are more expensive than regular via's, typically you don't need them though.

enter image description here

(This is a 6 layer board it seems, but imagine it's 4)

In the image above you have a "4" layer board. The blind via connects layer 1 to layer 2, but doesn't go to layer 3 or 4. But take a look at the "through via", it connects Layer 1 and Layer 4, but not 2 or 3. This ends up looking like a small hole on the inner layers that don't connect. Your board design software accounts for this when you add a via, removing some copper around the layers that it doesn't connect to.

I am only concerning about my connectors: the pins are soldered on the bottom. Normally THD are like vias, so it also has a connection on the top layer. Which I can connect then to a local ground plane which goes with vias down to the 2nd Layer. Is that alright ?

THD are kind of like via's, with no internal plane connections (usually, sometimes they do). You can safely solder these without shorting out your internal planes. You don't need to worry about "local ground planes", if the through-hole connects to a net with the same name as the internal layer, like GND, it will connect internally.

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  • \$\begingroup\$ Thanks Ron! So it does not make any problems for high frequencies(say 90 MHz) that the end of the "through via" stays "open" ? Also- in 2 layer PCB I see that there is FR4 as dielectricum. When I configure 4 Layer in Altium, I can't select FR4 between Layer 1(signals) and Layer 2 (Ground). Why is that so and is that bad ? Because of another dielectricum ? \$\endgroup\$
    – Jeres
    Commented May 1, 2020 at 15:32
  • \$\begingroup\$ The dielectric you will use is something you agree on with your manufacturer. It doesn't really matter in Altium what it says (unless you use Altium to simulate transmission line widths or such). In a 4 layer stack with FR4, you will usually have a FR4 core at the center, and two FR4 prepregs at the outside (Prepreg has uncured resin in it, and is cured when the different layers are pressed together). \$\endgroup\$
    – Joren Vaes
    Commented May 1, 2020 at 15:35
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    \$\begingroup\$ You shouldn't have issues at those speeds, I'm guessing not all the traces will be at 90MHz so you have to optimize for your high speed traces. I'm not very familiar with Altium, but usually you can't select different dialectrics between layers, that would need to be a custom stack-up you would negotiate with the board house, which would be happy to do it for $$$. \$\endgroup\$
    – Ron Beyer
    Commented May 1, 2020 at 15:35
  • \$\begingroup\$ But the FR4 prepregs will do the same job as the FR4 core, right? What about: 1. Layer : signals / 2.&3. Layer: Thermal/ 4. Layer Ground./ I am thinking that for the case that my thermal planes would have some noise, my ground plane would not be able to shield my signals, right ? And also the sense of my ground plane would be canceled in that design? \$\endgroup\$
    – Jeres
    Commented May 1, 2020 at 15:50
  • \$\begingroup\$ It depends on what signals they are, especially if you have differential traces you want to try as hard as you can to route them on the top with a ground plane underneath. Really you are getting into an entirely new question here and you should ask a new one rather than hash out your design in comments. \$\endgroup\$
    – Ron Beyer
    Commented May 1, 2020 at 15:52

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