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While checking the datasheet of ATMEGA 32 I have found a feature called 'On-chip 2-cycle Multiplier'. enter image description here

Can anyone explain to me what's that and what's the advantage of it?

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    \$\begingroup\$ Note that the ATMEGA 32 is an 8 bit MCU and the multiplier in question multiplies two 8-bit register values and provides a 16-bit result. So it may take a number of operations to, say, multiply two 32-bit numbers for a 64-bit result. \$\endgroup\$ Commented May 6, 2020 at 21:08
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    \$\begingroup\$ This also implies the MCU won't have support for integer division. MCU's are very limited in their capabilities, compared to CPU's. \$\endgroup\$
    – MSalters
    Commented May 7, 2020 at 12:28
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    \$\begingroup\$ It also implies that there are some AVR models that don't have a hardware multiplier. That line is just inconspicuously missing from e.g. the ATtiny25 datasheet. See also: ATtiny: no support for multiplication? \$\endgroup\$
    – ilkkachu
    Commented May 7, 2020 at 19:16

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It means that the ALU in the microcontroller has a hardware multiplier, which takes two instruction clock cycles to perform a calculation.

This is faster than doing multiplication using software (e.g. adding multiple times in a for loop).

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  • \$\begingroup\$ A dedicated logic circuit for multiplication to save clock pulses? \$\endgroup\$
    – Sadat Rafi
    Commented May 6, 2020 at 19:15
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    \$\begingroup\$ @SadatRafi Correct. Multiplication is a frequently used operation, so without a dedicated multiplier, the software would run slower, and take up more instruction memory. \$\endgroup\$ Commented May 6, 2020 at 19:18
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    \$\begingroup\$ It needn't be a lot of instruction memory, since you'd probably code it as a function and make multiple calls as needed. Definitely slower though. \$\endgroup\$ Commented May 7, 2020 at 17:28
  • \$\begingroup\$ This is not necessarily true. It could be the multiplayer is outside of the ALU and function like a co-processor. Although for this CPU it's done by the ALU. \$\endgroup\$ Commented May 7, 2020 at 23:40
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It means it has a hardware multiplier that takes can complete a multiply operation in two instruction cycles.

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Some processors can't multiply numbers, they only have addition and bit boolean logic.

This website discusses how to implement multiplication on a 6502 (The old Apple ][ computer, as well as other computers of that era). https://www.lysator.liu.se/~nisse/misc/6502-mul.html

These 8bit x 8bit operations take about 100 cycles per multiplication. You can see that a 2 cycle multiplication (done in hardware) is far superior. You can do simple DSP type calculations if you can do multiplies at half the clock rate.

The best CPUs can still only do 1 multiplication per cycle, because that is the definition of a clock cycle (although they can do many in parallel).

(Now division is a lot harder. Most CPUs take at least N clock cycles to do a division, where N is the number of bits. For some reason, dealing with the "carry" bit in multiplication can be done quickly, while the "carry" bit in division is much more difficult.)

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    \$\begingroup\$ "For some reason, dealing with the "carry" bit in multiplication can be done quickly, while the "carry" bit in division is much more difficult." the difference is in the ability to paralellise. In long multiplication you can do all the shifting and masking upfront, then rearrange the addition. In long division you need the results of each subtraction to decide what inputs to use for the next one. \$\endgroup\$ Commented May 8, 2020 at 0:06
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It's a feature that would perhaps have been impressive a decade or so ago.


Traditionally basic 8-bit processor cores did not have multiply instructions, silicon area was considered more important than performance.

Higher end 16 and 32 bit processor cores on the other hand typically did have hardware multiply instructions and furthermore worked with larger data word sizes.

Some of the high-end 8 bit (data word size) micro-controller architectures such as the "atmega32" and the "pic18" decided to add a multiply instruction. Since this was a new feature for 8-bit microcontrollers the manufacturers saw reason to shout about it. Both the "pic18" and "atmega32" implementations took a pair of 8 bit inputs and produced a 16 bit output, but the atmega32 version gives more options regarding the exact type of multiply that is desired.

but the elephant in the room is the arm cortex m0+. You can now get micro-controllers with a 32-bit data path and a single-cycle 32*32->32 multiplier for prices comparable to the high-end 8 bit micro-controllers.

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  • \$\begingroup\$ I don't even know what the difference is between a high end low end 8-bit MCU \$\endgroup\$
    – DKNguyen
    Commented May 8, 2020 at 3:02
  • \$\begingroup\$ Amount of ram fitted, architectural ability to deal with said ram, ability to read program memory as data, presence or not of a multiplier, number and capabilities of perhiperals to name a few. \$\endgroup\$ Commented Sep 11 at 18:51

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