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For as expensive as FCC-conformity lab testing costs, I am curious if there are any simulation tools that could help in producing an approximation of what a lab test would find, given a PCB design. Maybe just a ballpark for finding really bad emissions problems, or areas that could use some design improvements. I would imagine you could import a PCB design (gerbers?), poke in some stackup/parameters about your board, information about components, and define some waveforms that would appear out of IC pins.

Does anything like this exist? Seems like it could save a fortune compared to respinning and retesting PCBs.

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Yes, such tools exist. Example: https://www.ansys.com/applications/emi-emc. They're expensive, and expensive to run (lots of engineer time developing the models.)

It might be justified to use EMC sim if it is integrated as part of a co-design effort with mechanical (which itself has big $$ tooling and long lead time.) It can also help refine the design to reduce its BOM cost and improve its performance. High-stakes, high volume and safety-critical projects could use it. Think space-borne electronics, avionics, automotive, mobile phones and the like.

The reality is that board prototypes are relatively cheap and short lead time. 3D printing and other rapid prototyping techniques allow the mechanical stuff to be mocked up fairly well early in the project, with modest cost and short lead time. This needs to be done anyway to enable other work on a project, like software integration, user UX/UI testing, thermal testing, shock-and-vibe, demos and so forth. So you don't get to 'save' the cost of prototypes.

That leaves EMC lab time as a potential 'saved' cost on pre-scans. Guess what? Even a simulated design will get a pre-scan. In fact, larger companies (the kind that can afford EMC sim tools) will have their own EMC test facilities for this work if they find they can't abide EMC lab charges.

Given this, except for those high-stakes projects, it's hard to justify EMC sim since the tool license cost and engineering time to build the sim far outweigh the cost of prototypes and EMC lab time. Instead, experienced designers choose good techniques that are known to keep EMC at bay, and do pre-scans on prototypes to see where they stand.

So, even if there is a budget and staffing for EMC simulation, it doesn't replace prototyping and scanning. Protos and EMC sim would be used together, if EMC sim is used at all.

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Altium etc has expensive tools which do this but you can do near field emission testing with a shorted 10:1 probe near board with a spectrum analyzer to find the hot spots.

Reducing EMI is all about reducing the area of the current loops where dI/dt > 0.01A/us or >0.1A/100 ns . The area of the ground loop can be reduced with impedance calculated as ~ 8 nH/cm or you can buy or make shorted inductor loops with > 10 nH/cm * \$\mu _R\$

V=LdI/dt = 10nH/cm * 5cm * 0.1A/100 ns = 50 mV / ns rise time is an arbitrary design goal I used. You can correlate with frequency using f-3dB=0.35/Tr

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