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I'm trying to understand the function of these three 33R ohms resistors. The full schematic is here: Schematic enter image description here

I can understand the objective of R14 and R12: Split the clock and adapting it, but what is the function of R11? Is it another adaptation? and if so, have I to add another 33R resistor in the R_RXCLK side?

This schematic belongs to this board: LAN8720A ETH Board

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  • \$\begingroup\$ Can you provide a link to the full documentation of the board, not just the schematic? \$\endgroup\$
    – Elliot Alderson
    Commented Nov 19, 2021 at 12:10
  • \$\begingroup\$ @ElliotAlderson, I will update the question to include the documentation of the board. \$\endgroup\$
    – Kotik_o
    Commented Nov 19, 2021 at 12:45

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It's a series termination resistor for when the nINT/REFCLKO pin is configured as a clock output.

enter image description here

From the LAN8720A datasheet:

To reduce BOM cost, the device includes a feature to generate the RMII REF_CLK signal from a lowcost, 25MHz fundamental crystal. This type of crystal is inexpensive in comparison to 3rd overtone crystals that would normally be required for 50MHz.

In order to optimize package size and cost, the REFCLKO pin is multiplexed with the nINT pin. In REF_CLK Out mode, the nINT functionality is disabled to accommodate usage of REFCLKO as a 50MHz clock to the MAC.

Having this option allows the board manufacturer to select a cheaper/more available oscillator without re-designing the PCB.

On termination resistors:

The series termination is an often-used technique. It is performed by placing a terminating resistor in between the driver and the receiver. The resistor is placed near to the driver, and its value is chosen so that the combined impedance of the resistor and driver matches those of the PCB trace.

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  • \$\begingroup\$ One question about termination resistors: Who is the driver? the LAN8720 or the IC with MAC? and still not understand the 'divisor' created with R11 andR12. Can you help me? because if R12 and R12 is a 'adaptation divisor' this means that I have to add another 33R in the R_RXCLK line, right? \$\endgroup\$
    – Kotik_o
    Commented Nov 22, 2021 at 12:59
  • \$\begingroup\$ I'd guess the schematic posted is not completely true, the BOM probably differs some from the schematic. By checking the product photo I can see at least one part missing, but I cannot see the same thing in the schematics. Connecting CLKOUT back into CLKIN and OSC1 makes no sense at all. Probably R11 or R12 is not actually populated. \$\endgroup\$
    – Klas-Kenny
    Commented Nov 22, 2021 at 15:06
  • \$\begingroup\$ I suspect that R11 is not mounted. I will investigate it and I update the result here. \$\endgroup\$
    – Kotik_o
    Commented Nov 22, 2021 at 20:30
  • \$\begingroup\$ Confirmed. R11 is not mounted. It make sense because the a Clock Output. \$\endgroup\$
    – Kotik_o
    Commented Nov 22, 2021 at 20:57
  • \$\begingroup\$ There you go. Then the clock signal goes from OSC1 into CLKIN (through R14) and to the MAC REFCLK through R_RXCLK (and R12). This setup can be exactly found in the LAN8720 Schematic Checklist, with just the same 33 ohm termination resistors. \$\endgroup\$
    – Klas-Kenny
    Commented Nov 23, 2021 at 7:10

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