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How to calculate the number of (CMOS inverter) buffer stages to drive capacitive load? In my case, I am driving a 1nF capacitive load with CMOS (inverter) buffer with the digital signal having an amplitude of 0-5V, and 1Mhz frequency.

rise time is 5ns.

Thanks.

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    \$\begingroup\$ You need to know how strong are the buffer outputs and how fast the voltage at the capacitive load must change. \$\endgroup\$
    – Justme
    Commented Apr 12, 2022 at 11:26
  • \$\begingroup\$ What risetime do you want to achieve into your load? 1 ns edges will require a lot more current than 10 ns edges (well, 10x more current to be precise) \$\endgroup\$
    – Neil_UK
    Commented Apr 12, 2022 at 11:51
  • \$\begingroup\$ @Neil_UK rise time is 5ns. \$\endgroup\$
    – Bam_Khel
    Commented Apr 12, 2022 at 11:58

2 Answers 2

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You want it to change about 5V (10% to 90% I guess but ignore that for now) in 5ns, which is \$10^9\$ v/s, and the capacitor is \$10^{-9}\$F so you'll need an average current of 1A.

That's quite a bit of current and will require a significant driver such as a MOSFET gate driver (and be sure to read the fine print on how much current they actually pass, not just the datasheet blurb about '2A' or whatever- the current changes with the output voltage).

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The charge stored in a capacitance C at voltage V is CV = 1n x 5 = 5 nC

Another measure of charge is It, current I flowing for time t.

If we want to shift 5 nC charge in 5 ns, we need a current of 1 amp.

One amp is not really CMOS buffer territory, you need a FET Gate driver.

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