In an NMOS we have a p-substrate, and we use a positive voltage to attract negative charge "to the top". But could we have used negative charge to attract holes instead and gotten a "hole-current"? I am confused by this because the p-substrate have more holes than negative minority carriers so why not attract the holes to the top instead?
Is there a simple explanation for this?
In a N-channel MOSFET with Vgs = 0, there is a depletion region between the source and drain N+ regions and the P-type substrate that is a barrier to current flow. In normal operation with Vgs > 0, minority carriers are attracted to the oxide interface in sufficient quantities to create an inverted channel that acts as a N-type "bridge" between the source and drain (ignoring channel length modulation etc). If Vgs < 0, you are attracting more substrate majority carriers to the oxide interface but the depletion region still exists so there is no change in current between source and drain.
In an NMOS, the source and drain are N diffusions. When a channel (electrons) is formed, you can imagine a continuous conductive sheet is formed between S and D at the top surface of the channel.
If you bias the gate negatively, more holes will accumulate under the gate, but the electrons in the S can't enter this P-type region (because of the P-N potential barrier), so no current can flow.
