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I'm trying to make a MS JK Flip Flop with Preset and Clear using only transistors(BC547B) and resistors in LTSpiceXVII. I made four 3-input NAND gates for the master flip flop and four 2-input ones for the slave. When I ran the simulation and measured the voltages at the outputs they were not what I expected. Q toggles on both edges of the clock pulse and Q` just varies slightly. I'm not very well versed in electronics so could anybody tell me what I'm doing wrong.

Logic DiagramLogic Diagram SchematicSchematic Clock pulseClock Pulse Voltage at QVoltage at Q Voltage at Q`Voltage at Q'

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  • \$\begingroup\$ Which node is V(n20)? \$\endgroup\$
    – devnull
    Commented Sep 29, 2022 at 14:05
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    \$\begingroup\$ @devnull The node at the right of the voltage source named PULSE I also edited my post to add a logic diagram and Image descriptions \$\endgroup\$
    – Simon Henry
    Commented Sep 29, 2022 at 14:31

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