I have GNDC (chassis GND) and GND (digital GND) on my PC motherboard design.
All connectors in my design (RJ45, USB-TypeC, USB-TypeA, HDMI, DP, etc.) are connected to the chassis through the GNDC plane through the mounting holes (see last picture below.)
During my work, I've looked at previous designs and I saw the following connection between GNDC and GND (on PCB):
Question 1:
Why is this circuit useful? Should I keep it in my PC motherboard design?
Here is the circuit for my DC jack power connector circuit:
Note: The N-MOSFET is for reverse polarity protection.
Question 2:
Is the way I connected GNDC to the drain of the N-MOSFET and GND on the source with the ferrite beads inbetween acceptable?
As far as I kniow, the the chassis shouldn't have any current pass through it. How does this GNDC connection guarantee that current goes only inside the DC jack connector and not to the outer chassis itself, which might cause safety hazards to the consumer?
These are the mounting holes that connect to chassis and the GNDC plane:
Question 3:
I understood that GNDC should be the cleanest ground reference on the board, and digital GND is the one with all the "garbage/noise". First of all, is this statement true? If the answer is "yes," to what this clean GNDC is a good reference for?
I also got advice from an experienced co-worker that GNDC plane should not be close to any other plane, especially GND so that it will not absorb all the noise coming form near planes, like GND and power. The preferred way is to make GNDC shared between all layers, to prevent overlap.
My layer stackup is eight layers. I have layer 2: GND, layer3: signals, layer 4: 3.3V and I have GNDC connection shared between all layers, except a plane on layer 3 (see orange rectangle,) which is just on layer 3.
This means that this plane selected in orange can be affected by noise from layer 2 and 4. What harm can this do, and how critical is it?
I can remove this connection plane and just leave the connection to the lower mounting hole.