How can I do immediate addition in the Atmel AVR instruction set?

Question

I've been doing some AVR assembly programming for a university course, and I recently happened upon a situation where I would have wanted an "add immediate" instruction. However, no such instruction seems to exist within the Atmel AVR instruction set. I find this weird given that there are immediate variants of various other instructions, such as subtract, logical AND, compare, and even "add immediate to word" (ADIW), among others. What can I use in place of add immediate to perform immediate addition when doing AVR assembly programming?

Answer 1

There is a subi instruction - "subtract immediate". You can easily do addition using this instruction, so one can speculate there isnt a need for a dedicated add immediate instruction.

For example, to add 2:

subi r16, 254

Alternatively, you can also express it like this using a negative number:

subi r16, -2

Answer 2

I find this weird given that there are immediate variants of various other instructions

The rationale behind this instruction design is that add-immediate can be performed by subtract-immediate, hence no silicon wasted¹. All that has to be done is to take the 2's complement of the immediate value, which can be done with zero overhead as the value is known at assembly time.

The following code shows how to use that with the GNU assembler². For example, this code will add a value of 2 to 32-bit register R19:R16

    subi r16, lo8(-2)
    sbci r17, hi8(-2)
    sbci r18, hlo8(-2)
    sbci r19, hhi8(-2)

This can also be used with symbols that are only known at link time. Suppose you have a 16-bit value in the Z-register and want to access an array of 16-bit values my_array at index Z:

    ; Multiply Z by 2 to access array of 16-bit values
    lsl  r30
    rol  r31
    ; Add start address of array my_array to Z.
    subi r30, lo8(-(my_array))
    sbci r31, hi8(-(my_array))
    ; Read 16-bit value from my_array using post-increment addressing.
    ld   r16, Z+
    ld   r17, Z+
    ; ...
.data
my_array:
    .space 2 * 256

In the case where the offset is known at assembly time and in the range 0...−63, subtracting from a W register wider than 16 bits can be combined³ with sbiw, e.g. subtracting 10 from 32-bit register R24:

    sbiw r24, 10
    sbci r26, 0
    sbci r27, 0

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¹Or to put silicon to a better use: The first AVR instruction design actually did have add-immediate, but soon was kicked out to free some silicon for instructions that cannot be trivially represented by others.

²Which has the benefit that it can be used in conjunction with avr-gcc, i.e. one can combine assembly with C/C++.

³Except for devices from the Reduced Tiny familiy like ATtiny10, which support neither sbiw nor adiw.

Answer 3

If the assembler isn't braindead, it should be synthesizing addi using subi. Some assemblers are lacking in that respect so YMMV. I'm sure Microchip's doesn't synthesize addi even though it'd be trivial to do so.

Anyway, all you need is a macro:

.MACRO ADDI
    SUBI @0, low(256-@1)
.ENDMACRO

; Usage
    LDI  R0, 1
    ADDI R0, $AB
    ; now R0 holds $AC

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Yes, I am making a strong judgement about an assembler that supports subi but doesn't synthesize addi. What's up with that? Synthesis of more descriptive opcodes is common in various architectures.

Imagine that on RISCV you'd have no nop because "it doesn't exist", and had to type addi x0, x0, 0 every time you meant nop? And yes, RISCV does not "waste" an opcode on a nop. By convention, nop is encoded as addi x0, x0, 0 and that's that.

The situation on AVR isn't much different. If you mean addi, the assembler should just do it, since the hardware supports it directly and in a single instruction...

Also, AVR wastes a perfectly good opcode (nop) where it could have been encoded as, say mov r17, r17 = 0010'1111'0001'0001b. Takes same time as a nop, has same side effects (none)...