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Even though MC14500B is considered as 1-bit computing where it accepts 1-bit data to perform operation, the instruction set itself consisted with 4-bit instruction which leads having 16 total instructions. [0]

In another side, BitBitJump is the simplest OISC (One-Instruction Set Computer) language, which allows computations by only bit copying process without using conventional logic operations like AND, OR, XOR, NAND, or NOT. Its instruction is to copy one bit from one address to another and jump. [1]

The instruction has three operands, A is the address of the bit to copy from. B is the address of the bit to copy into. C is the address to pass the execution after copying of the bit is done. [2]

With just using one instruction, it's qualified as turing machine complete. Means, it can perform any computational problem like how most advanced computer perform today. Like basic arithmetic addition (even though no ALU is used). [3]

So, there is no need to having 16 available instructions.

So, is it possible that I can construct such computer theoritically, and practically in HDL like Verilog? How do I do that in overview? Shall I use Von-neumann architecture or Hardvard?

I expect the word size in memory is 1-bit. Here is the memory content example:

Addr (n-bit) Data (1-bit)
0 0
1 1
2 0
3 1
4 1

I think address size doesn't matter. Because it's extendable like how we bought new RAM to our PC for increasing capacity (means increasing num of address).

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Start by writing a high-level functional simulation of your proposed architecture using your favorite programming language. Then you will be able to write some sample programs for it and determine whether it is worth pursuing to the next level of detail.

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This instruction set can only perform condiuotion checks by modifyiong executable code, therefore it's only Turing complete if it can modify its program code, therefore you are constrained to using a von Neumann architecture.

I would start with a simulator written in a general purpose language

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  • \$\begingroup\$ @DaveTweed a Turing machine has state transitions conditional on input. A naive bitbitjump does not. A harvard bitbitjump machine has a staticly fixed instruction sequence that is either linear or loops a fixed sequence. It needs to be able to modify the jump operand of instructions to achieve conditional execution. \$\endgroup\$
    – user1937198
    Commented Jul 4 at 12:25
  • \$\begingroup\$ An alternative approach that would be harvard like would be to add indirectly by gaving each instruction to contain the address of a data word containing a pointer to the next instruction. The data word would then be modifiable to achieve conditional execution. \$\endgroup\$
    – user1937198
    Commented Jul 4 at 12:27
  • \$\begingroup\$ @user1937198: I was wondering about that. I was assuming that there was more to it than the OP's brief description, because if the "next address" field is fixed, then it isn't needed at all -- you might as well just execute the instructions sequentially. \$\endgroup\$
    – Dave Tweed
    Commented Jul 4 at 16:18
  • \$\begingroup\$ @DaveTweed for a counter example, consider the operation of the universal turing machine. but anyway clearly the only way to write branching code is to modify the next instruction part of the machine instructions. if there is a path to Turing compoleteness that doesn't involve branching or conditional execution I have yet to encounter it. \$\endgroup\$
    – Jasen Слава Україні
    Commented Jul 5 at 0:44
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    \$\begingroup\$ Yes, that's useful. And I apologize, I misconstrued your answer to be implying that all Turing-complete machines must be von Neumann, rather than just the architecture that the OP was describing. If you edit your post to make that clearer, I can clear my down-vote. \$\endgroup\$
    – Dave Tweed
    Commented Jul 5 at 1:11

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