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DC-DC converters datasheets generally specify their output ripple and the switching frequency.

From what I understand, the output ripple goes down as the switching frequency goes up.

When using a voltage regulator to filter the output ripple (for example this one), the rejection of the ripple depends on its frequency. Generally the lower the switching frequency (from what I understand), the better the filtering will be, as more harmonics are going to end up being in the rejection bandwidth of the voltage regulator.

The question is do you have a general rule of thumb for the trade-off between the switching frequency and the output ripple of a DC DC converter in the case where the output of the converter is regulated by a voltage regulator?

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Converter design is a study in optimizing tradeoffs between many parameters.

Size, switching frequency, efficiency, ripple, cost, EMI, and transient performance are all interrelated.

The only rule of thumb I have is to use the lowest switching frequency you can get away with while meeting all of the other system requirements.

If you're post-regulating then pick a regulator with the appropriate amount of PSRR at the switching frequency.

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  • \$\begingroup\$ thank you for your answer, can you precise what you mean by "get away with" ? I am new to electronics, what could happen for switching frequencies that are too low ? \$\endgroup\$
    – UnstableDynamics
    Commented Sep 7, 2023 at 17:15
  • \$\begingroup\$ As you lower the switching frequency you will typically need a larger inductor, and larger output capacitance for the same ripple. So your physical solution size will trend higher. Also, the maximum loop bandwidth you can achieve will typically be lower, so your transient response may suffer. \$\endgroup\$
    – John D
    Commented Sep 7, 2023 at 17:39

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