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ocrdu
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FPGA Logic Thresholdlogic threshold - Distinguishingdistinguishing a Logiclogic 0 and 1

I'm new to FPGAs and I'm trying to determine how an FPGA determines whether to register an input as a logic 0 or 1. The FPGA I am using is the Artix 7 and I would like to connect it to a function generator giving a square wave that toggles between 0 and 3.3V3 V.

In my constraints file I set the pins where I am connecting the function generator to the LVCMOS33 IO standard. Do I need to set the logic threshold as well or is it automatically set at 1.65V65 V since I have the standard at 3.3V3 V?

Here is the FPGAs data sheet for switching characteristics, but I haven't found any threshold information.

FPGA Logic Threshold - Distinguishing a Logic 0 and 1

I'm new to FPGAs and I'm trying to determine how an FPGA determines whether to register an input as a logic 0 or 1. The FPGA I am using is the Artix 7 and I would like to connect it to a function generator giving a square wave that toggles between 0 and 3.3V.

In my constraints file I set the pins where I am connecting the function generator to the LVCMOS33 IO standard. Do I need to set the logic threshold as well or is it automatically set at 1.65V since I have the standard at 3.3V?

Here is the FPGAs data sheet for switching characteristics but I haven't found any threshold information.

FPGA logic threshold - distinguishing a logic 0 and 1

I'm new to FPGAs and I'm trying to determine how an FPGA determines whether to register an input as a logic 0 or 1. The FPGA I am using is the Artix 7 and I would like to connect it to a function generator giving a square wave that toggles between 0 and 3.3 V.

In my constraints file I set the pins where I am connecting the function generator to the LVCMOS33 IO standard. Do I need to set the logic threshold as well or is it automatically set at 1.65 V since I have the standard at 3.3 V?

Here is the FPGAs data sheet for switching characteristics, but I haven't found any threshold information.

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PrematureCorn
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FPGA Logic Threshold - Distinguishing a Logic 0 and 1

I'm new to FPGAs and I'm trying to determine how an FPGA determines whether to register an input as a logic 0 or 1. The FPGA I am using is the Artix 7 and I would like to connect it to a function generator giving a square wave that toggles between 0 and 3.3V.

In my constraints file I set the pins where I am connecting the function generator to the LVCMOS33 IO standard. Do I need to set the logic threshold as well or is it automatically set at 1.65V since I have the standard at 3.3V?

Here is the FPGAs data sheet for switching characteristics but I haven't found any threshold information.