Shared or separate SPI buses for peripherals in a PCB?

Question

I have four SPI-controlled chips which I want to control from Zynq-7020 via an FMC LPC connector. Each chip/device requires an SCLK, MISO, MOSI and CS line.

I'd like to give each device their own separate SPI bus, but for my given application, I don't have enough clock capable (CC) pins on the FMC LPC connector to give each device their own SPI SCLK. I do have enough pins to give each device separate MISO, MOSI and CS lines. There are a few options on what I could do, and I am wondering what the advantages/disadvantages of each would be:

1) Every device shares a single SPI bus (Separate CS lines, but shared SCLK, MISO, MOSI)

2) Shared SCLK, but separate MISO, MOSI, and CS lines for each device

3) Separate SPI buses, driving SCLKs through LA pins instead of CC pins on the FMC LPC interface. (I am not sure if my FPGA would like that I am driving a clock from a non-CC pin)

My target device is a PCB, what implications would each of the three options have on my design, and what would be the best option?

Answer 1

Having separate MOSI/MISO/CLOCK for generic sub-megahertz devices in SPI bus defeats the purpose of a SPI bus.

You only need to separate them if they have different priorities, one goes off board via wire or some other case. In those cases you should select the microcontroller to have enough built-in hardware SPIs. That would be if your FW has a state where it only polls the most critical bus or reacts to interrupts from a bus or such.

If you do have some specific edge case that doesn't fit the previous, you could use a one directional logic buffer circuit for MOSI and CLK to distribute them in separately.

Or you could use a SPI/generic multi signal mux, possibly a short circuit proof one might come in handy.

Answer 2

1 - If your SPI clock is slow, less than 10 MHz, you can use a GPIO to generate the clock. At this speed, you have enough timing margin, you don't need a dedicated clock output. The SPI "Clock" can be generated using a counter.

2 - Having a dedicated SPI clock is usually better for EMC. I have a seen a few cases where a slow-ish free-running clock would cause noise and EMC problems.

3 - Having seperate SPI links mean you can communicate in parallel with these devices. It can be helpful in some applications...

Answer 3

In applications where there is risk of noise from the SPI CLK - I have used a multi in/out MUX IC for attaching multiple devices to the same bus. The MUX will act like a pass transistor. At higher SPI frequencies this may be harder to achieve due to impedance matching.