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This is a normal design of 4-bit counter using D flip-flops enter image description here

The outputs Q0 to Q3 are connected to diodes. I want to modify this counter in such a way that it follows the following counting sequence and that it could be set back to 9 asynchronously (maybe through the Reset and Preset inputs of the flip-flops?) anytime. enter image description here

Any help would be much appreciated, thank you.

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    \$\begingroup\$ What are your restrictions? The straight-forward way will be to add a function mapping from Q to the desired outputs. \$\endgroup\$
    – Eugene Sh.
    Commented May 9, 2019 at 14:03
  • \$\begingroup\$ Only the restrictions I mentioned in the topic. Can you explain more how a mapping function should look like ? \$\endgroup\$
    – anisgh
    Commented May 9, 2019 at 14:17
  • \$\begingroup\$ I just went through a similar process for someone else here. Didn't include the async reset, though. Used TFF instead of DFF. \$\endgroup\$
    – jonk
    Commented May 9, 2019 at 14:17
  • \$\begingroup\$ Thank you that looks helpful, I will read it throughly. One of my restrictions is to use DFFs though. \$\endgroup\$
    – anisgh
    Commented May 9, 2019 at 14:23
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    \$\begingroup\$ @asisgh this is basically a state machine, map out the states and the state outputs. \$\endgroup\$
    – Voltage Spike
    Commented May 9, 2019 at 14:47

1 Answer 1

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Simple table provides what's needed:

$$\begin{array}{c|c} \text{Beginning State} & \text{Ending State}\\\\ {\begin{array}{cccc} Q_D & Q_C & Q_B & Q_A\\\\ 0&0&0&0\\ 0&0&1&1\\ 0&1&1&0\\ 1&0&0&1\\ 1&1&0&0\\ 1&1&1&1\\ 0&0&1&0\\ 0&1&0&1\\ 1&0&0&0\\ 1&0&1&1\\\\ 0&0&0&1\\ 0&1&0&0\\ 0&1&1&1\\ 1&0&1&0\\ 1&1&0&1\\ 1&1&1&0\\ \end{array}} & {\begin{array}{cccc} D_D & D_C & D_B & D_A\\\\ 0&0&1&1\\ 0&1&1&0\\ 1&0&0&1\\ 1&1&0&0\\ 1&1&1&1\\ 0&0&1&0\\ 0&1&0&1\\ 1&0&0&0\\ 1&0&1&1\\ 0&0&0&0\\\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ \end{array}} \end{array}$$

Now the four K-map tables.

$$\begin{array}{rl} \begin{smallmatrix}\begin{array}{r|cccc} D_D&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&0&x&0&0\\ \overline{Q_D}\:Q_C&x&1&x&1\\ Q_D\: Q_C&1&x&0&x\\ Q_D\:\overline{Q_C}&1&1&0&x \end{array}\end{smallmatrix} & \begin{smallmatrix}\begin{array}{r|cccc} D_C&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&0&x&1&1\\ \overline{Q_D}\:Q_C&x&0&x&0\\ Q_D\: Q_C&1&x&0&x\\ Q_D\:\overline{Q_C}&0&1&0&x \end{array}\end{smallmatrix}\\\\ \begin{smallmatrix}\begin{array}{r|cccc} D_B&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&x&1&0\\ \overline{Q_D}\:Q_C&x&0&x&0\\ Q_D\: Q_C&1&x&1&x\\ Q_D\:\overline{Q_C}&1&0&0&x \end{array}\end{smallmatrix} & \begin{smallmatrix}\begin{array}{r|cccc} D_A&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&x&0&1\\ \overline{Q_D}\:Q_C&x&0&x&1\\ Q_D\: Q_C&1&x&0&x\\ Q_D\:\overline{Q_C}&1&0&0&x \end{array}\end{smallmatrix} \end{array}$$

Let's start with \$D_A\$ and just follow along to see how I changed the \$x\$ values. Here we get: \$D_A=\overline{Q_A}\$:

$$\begin{array}{rl} \begin{smallmatrix}\begin{array}{r|cccc} D_A&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&0&0&1\\ \overline{Q_D}\:Q_C&1&0&0&1\\ Q_D\: Q_C&1&0&0&1\\ Q_D\:\overline{Q_C}&1&0&0&1 \end{array}\end{smallmatrix} \end{array}$$

Next is \$D_B\$. Again, spot my changes to \$x\$. See that: \$D_B=\overline{Q_A}\:\overline{Q_B}+Q_C\: Q_D+Q_A\: Q_B\:\overline{Q_D}\$:

$$\begin{array}{rl} \begin{smallmatrix}\begin{array}{r|cccc} D_B&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&0&1&0\\ \overline{Q_D}\:Q_C&1&0&1&0\\ Q_D\: Q_C&1&1&1&1\\ Q_D\:\overline{Q_C}&1&0&0&0 \end{array}\end{smallmatrix} \end{array}$$

Now for \$D_C\$. Spot changes and see: \$D_C=\overline{Q_A}\:\overline{Q_B}\:Q_C+Q_A\:\overline{Q_B}\:\overline{Q_C}+Q_B\:\overline{Q_C}\:\overline{Q_D}\$:

$$\begin{array}{rl} \begin{smallmatrix}\begin{array}{r|cccc} D_C&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&0&1&1&1\\ \overline{Q_D}\:Q_C&1&0&0&0\\ Q_D\: Q_C&1&0&0&0\\ Q_D\:\overline{Q_C}&0&1&0&0 \end{array}\end{smallmatrix} \end{array}$$

And \$D_D\$: \$D_D=\overline{Q_B}\:Q_D+ Q_C\:\overline{Q_D}\$:

$$\begin{array}{rl} \begin{smallmatrix}\begin{array}{r|cccc} D_D&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&0&0&0&0\\ \overline{Q_D}\:Q_C&1&1&1&1\\ Q_D\: Q_C&1&1&0&0\\ Q_D\:\overline{Q_C}&1&1&0&0 \end{array}\end{smallmatrix} \end{array}$$

So the equation summary from the above work is:

$$\begin{align*} D_A&=\overline{Q_A}\\ D_B&=\overline{Q_A}\:\overline{Q_B}+Q_C\: Q_D+Q_A\: Q_B\:\overline{Q_D}\\ D_C&=\overline{Q_A}\:\overline{Q_B}\:Q_C+Q_A\:\overline{Q_B}\:\overline{Q_C}+Q_B\:\overline{Q_C}\:\overline{Q_D}\\ D_D&=\overline{Q_B}\:Q_D+ Q_C\:\overline{Q_D} \end{align*}$$

Just note that the above isn't the only possible arrangements. By choosing differently for the \$x\$ values, you might come up with different (but equivalent) equations. If you put in a little time formulating them in several ways, you might find a better arrangement for the final circuit (fewer gates.) But I've only so much time to apply and I'm stopping it here.

Clearly, \$D_A\$ is free and \$D_D\$ is just a mux (if allowed.) The other two will involve a little more logic. But if you wire it up, it should work.

Here's how I implemented it in Neemann's Digital:

enter image description here

Worked exactly as expected.

The one thing that is missing is the reset to a specific point. I'll leave that to you.

The async reset to 9 was simple to add. So here it is despite "leaving it to you":

enter image description here

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  • \$\begingroup\$ Hi thank you for your time and help! I have tried this myself and it doesn't seem to work properly. Diode C is always on, diode D keeps jumping between 1 and 0 and the other two are always 0. \$\endgroup\$
    – anisgh
    Commented May 9, 2019 at 22:04
  • \$\begingroup\$ @anisgh Works fine for me. What do you mean by "diode?" \$\endgroup\$
    – jonk
    Commented May 9, 2019 at 22:06
  • \$\begingroup\$ Sorry I meant LEDs, and thank you now it's working perfectly fine. Any ideas on how to do the reset ? \$\endgroup\$
    – anisgh
    Commented May 9, 2019 at 22:42
  • \$\begingroup\$ @anisgh Yes. If you use DFFs with both async SET and RESET added to them, you can simply wire up your reset control line to the appropriate SET or RESET of them. For a synchronous reset, you can insert a set of muxes prior to each D input. The select input to the muxes would decide whether or not the usual normal state is applied or if a hard-coded binary pattern is selected. \$\endgroup\$
    – jonk
    Commented May 9, 2019 at 22:55
  • \$\begingroup\$ I can't seem to really understand how the SET and RESET inputs exactly work.. I don't need a synchronous reset, I just need a reset so that when pressed it gets back to 9 regardless of the clock, if you have some time, can you please modify the circuit above to do that? it would help me understand. Thank you very much. \$\endgroup\$
    – anisgh
    Commented May 9, 2019 at 23:03

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