What's the correct sequence to start thinking about a BJT circuit

Question

A very basic circuit as shown below, the 1V step voltage is applied @ +1V @ t=0.

Edit:
Unfortunately the entire question was asked based on a wrong assumption, that is: "Vbe only controls the upper limit of Ic, not the actual amount of Ic, the actual amount of Ic depends on how much the outer circuit can supply" The misconception came from my effort to apply band gap model to explain BJT's circuit behavior and it is not successful so far.

However many knowledgeable people mentioned many BJT transient behaviors and those answers are very informative.

the sequence of events are best described in the accepted answer

Answer 1

I simulated your circuit in LTspice using a BC547B. Here is the result:-

Before t = 0 the transistor's C-B and C-E parasitic capacitances are charged to 5V, and the B-E parasitic capacitance is uncharged.

When the 1V step is applied the B-E junction is effectively short-circuited by its capacitance, so all terminals jump up by ~0.33V as Rb and Rc||Re divide the voltage step by 3. As the capacitors charge so the Collector voltage falls back to 5V and the B-E voltage difference widens. Vbe is 'small' so no transistor action is occurring, and the effect is the same as if the circuit just consisted of resistors and capacitors.

This continues until ~30ns when Vbe gets to ~0.55V and the Base starts to draw significant current. The transistor then amplifies that current at the Collector, pulling Vc down. As more current flows from Collector to Emitter the downward trend of Ve is reversed, eventually stabilizing at 0.39V with Vbe at 0.61V and Vc at 4.61V.

A simplified analysis could ignore all this and just assume that Vbe will shortly become ~0.6V. Then Ve would be 1-0.6 = 0.4V, Ic would be 1k*0.4 = 0.4mA, and Vc would be 5 - (0.4*1k) = 4.6V.

Answer 2

What you describe is the common situation where an emitter resistor provides negative feedback in the common-emitter configuration. Do you have an actual question?

Your language is confusing. What does it mean to say that "B is open circuit"...an open circuit requires the specification of two nodes. The upper limit for \$I_C\$ is determined, to first order, by the values of \$V_{CC}\$, \$R_C\$, \$R_E\$, and \$V_{CESAT}\$. You want to say that the transistor is controlled by \$V_{BE}\$, that's fine, as long as we understand the relationship between \$V_{BE}\$ and \$I_B\$. In typical situations the relative change in \$I_B\$ is much greater than the change in \$V_{BE}\$ so we usually find it more convenient and reasonable to consider the transistor as being controlled by \$I_B\$.

Answer 3

To look at schematic and decide if it looks right or not, first examine the DC Q points for each terminal voltage and current and consider the impedances that affect input loading, voltage gain and symmetry.

For example when you choose Rb,Re,Rc all the same value in a CE amplifier, there is no voltage gain (0dB).

A more useful ratio of values might have Rc/Re=>10 and Rb

Above shows a low Miller Capacitance and power up surge current.

Answer 4

From the considerations above, we can conclude that, during the transition, the transistor can be thought as something slow... rather an integrator than an amplifier. So, to imagine how the transition is going, we can place ourselves in its place (empathy). The conceptual picture below can help understanding in this way. There I have visualized the voltages with vertical bars in red, which height is proportional to the voltage value (in association with a water column); the currents are represented by closed paths in green.

Here the output collector-emitter part of the transistor is emulated by a rheostat with variable resistance \$R_{CE}\$ so the stage is simply a triple voltage divider (\$R_{C1}\$, \$R_{CE}\$ and \$R_E\$) supplied by \$V_{CC}\$. The little man (we) is keeping \$V_E = V_{IN}\$ by moving the slider of the collector-emitter rheostat \$R_{CE}\$. For this purpose, he observes the base-emitter zero indicator and changes the rheostat resistance in the respective direction to zero the indicator reading. By the way, the "man-emulated transistor" precisely equalizes \$V_E\$ to \$V_{IN}\$ (there is no \$V_{BE}\$ here)... and there is no current (\$I_B\$) drawn from the input source (the indicator is bootstrapped).

Since the current of this circuit of three resistors in series is the same, there is the same proportion between the voltages and resistances - the ubiquitous \$V_{RC}/V_E = R_C/R_E\$ and this is the gain of the stage. We can see a similar idea in the op-amp inverting and non-inverting amplifiers where the op-amp plays the role of \$R_{CE}\$ (or, more precisely, of "varying \$V_{CC}\$")... only it is not inserted between the other resistors but out of them.

Indeed, there is no base resistor in this picture but its role is minor in this configuration.