What is the primary motivation behind combining A series and R series ARM onto an FPGA in MPSoC Xilinx devices?

Question

The first entry into the SoC series from Xilinx was the Zynq SoC. It combined ARM cortex A9 processor with programmable logic to get the best of both worlds.

The current generation contains Ultrascale+ devices that Zynq UltraScale+ MPSoC and Zynq UltraScale+ RFSoC. These contain:

Dual or Quad Arm® Cortex®-A53
Dual Arm Cortex-R5F

What I fail to understand is, what would a person do with so many cores? And why mix A and R series ARM processors anyway? I don't know what the difference between them is. If we need processing power, we could just go for a DSP, GPU or something else isn't it? I am missing the point here actually.

Answer 1

Multiple CPUs on an SoC FPGA have several typical applications, some examples being:

• Each CPU targeted to a specific task and I/O, either with private buses and/or memory and/or IO or shared with other CPUs.
• Two sets of CPU/memory with shared I/O for dual redundancy.
• Three CPUs connected in lock-step for triple-mode redundancy.

This list of examples far from not exhaustive, though I'll refrain from keeping tweaking it.

Many of these functions are found on microcontrollers and SoCs but without the FPGA gates, which is why they're made.

One thing's for sure: they will all be in there because enough customers requested them for specific applications they have. They'll have stayed on their product line-up because customers kept buying them. They're not made to see if they might sell. With the very large devices, it's typically relatively few customers buying relatively few parts at relatively very high cost (some many £k/part). Like most manufacturers, FPGA manufacturers are very market driven for their higher-end products.

Answer 2

The inclusion of both A53 and R5 cores is aimed at applications where both a significant amount of processing is required together with high safety requirements. This is especially a requirement for automotive applications.

The processing tasks are going to be divided into those that can be performed effectively by the FPGA fabric, such as spectral analysis (FFT) and beam forming, those that require more complex but less structured processing such as object detection, classification and tracking (A53 cores) and those requiring very high reliability such as safety monitoring (R5F cores).

For example:

4D Imaging Radar for Autonomous Driving