The simplest example I can think of to illustrate this is as follows:
You fix a \$V_{gs}\$ voltage at the left \$M_1\$. You get a current \$M_1\$ flowing, but you have no idea what is it: process variation, temperatures, etc will determine what's the actual current flowing through it. At the top, you have a current source. This source, by definition, must keep sourcing the same current no matter what the voltages at its terminals are, i.e. it doesn't define any node voltage.
On the other hand, with the feedback loop, you have a clear mapping between \$V_{gs}\$ and \$I_{ds}\$. Remember that feedback loops need a sense and a control mechanism to function properly.
If \$I_{ds}\$ increases and causes a change in \$V_{ds}\$, this will be sensed by the gate with a swing of the opposite sign. Assuming a very crude low frequency NMOS small-signal model (just a \$g_m\$ and a \$r_o\$), a change in \$V_{gs}\$ (say, due to a change in the gate voltage; the source is fixed to ground), \$\Delta V_{gs}\$, will cause a change, at the same node, given by:
$$
-\Delta V_{gs}\frac{g_mr_oR_1}{R_1+R_f+r_o}
$$
This simply means the output is acting up to suppress the swing at \$M_1\$'s gate. When the opposing signal is at the gate, then it is kept at its nominal \$V_{gs}\$ voltage and thus, the output current is also kept constant after the feedback has acted up.
Now, how does the \$M_1\$'s drain know where to settle? Well, at startup, all we know is that there will be a current flowing through the circuit due to the current source \$M_2\$. This current will begin flowing through the \$R_F-R_1\$ branch first and \$M_1\$ later. \$M_1\$'s gate voltage will increase and this will allow more current to flow through it. There will be a point where the most of the current from the current source will flow through \$M_1\$'s drain, and what's left through the \$R_F\$-\$R_1\$ to keep it biased at fixed voltage.
Whatever the drain voltage is, the gate voltage will be determined by simple voltage division \$V_{ds}\frac{R_1}{R_1 + R_F}\$ (assuming negligible current through the gate).
As a bonus, you'll probably notice that this circuit is the MOS equivalent of the so-called \$V_{be}\$ multiplier. Just take a look at them, they are exactly the same, except for the transistor type.
In short, feedback allows nodes to have very little swing as the loop only function is to suppress them, this is what keeps all transistors properly biased. Obviously, the last stage of any multi-stage amplifier is the one with the largest swings, as it probably has to output a large voltage. That's why they usually dominate distortion and small-signal analysis is not that accurate in such stages.