# The characteristics of a JFET

I understand that when Vgs = 0, and there is a steady current Vds, there is a pinching shaped depletion region and so on. But what I have a confusion with is when Vgs > 0 or Vgs < 0.

The book states that when Vgs < 0, the Vds current will be less and the pinched depletion region will be achieved at lower Ids. My explanation is that since some of the charge from the source moves to the source between Vgs, the current/charge flow decreases, but since Vds remains same, the depletion pinched region stays the same. Is this correct?

In case of a positive connection to g between Vgs, i.e. Vgs > 0v I can't think of what happens.

• A JFET will act as a forward biased diode when V(GS) > 0V. You could of course study a datasheet, eg. for a J108 or Google around a bit for other types and datasheets. Commented Nov 22, 2015 at 20:49
• Thanks, just wondering, is the explanation on second paragraph correct? Commented Nov 22, 2015 at 20:50
• My knowledge on JFETs is too rusty to say for sure. Commented Nov 22, 2015 at 20:53
• I agree with @jippie - look at a data sheet and particularly the graphs of Id versus Vds for various gata voltages. If you have any further questions come back. This question is corrupted by half guesses and lack of better understanding. Commented Nov 22, 2015 at 22:09

## 1 Answer

When VGS < 0.6 or so, a depletion region is formed between the gate and the channel (which is the conductive region between the drain and source). As VGS becomes more negative, this depletion region widens further into the channel, 'squeezing' the conductive region -- thereby reducing the current that flows.

With positive VGS (up to ~ 0.6 V or so), the depletion region narrows, and the device would run more current.

With VGS even greater than this, the gate-channel junction is forward biased, and a large gate-source current flows. This is generally not a useful mode of operation. Depending on the structure of the device, drain current may change also.