Principles for premature failure analysis of PCB tracks and vias

Question

I have just given a task to implement a setup to detect whether or not a track or via on a PCB is going to fail in any time in the future. The PCBs are supposed to be used in harsh environment e.g. somewhere with a lot of thermal cycles (ambient temperature to something near 100 or even higher degrees Celsius.

For the simulation, I have access to a smart oven which I can give thermal profiles to stress these PCBs for weeks or even possibly months.

My question is, what exactly should I focus to measure. My initial guess will be inducing a fixed and accurate current into the tracks and measure the voltage drop. I would guess if the tracks and vias are being aged (I think for vias it is called barrel fatigue?), the most obvious characteristic to change would be their resistance. But I have a feeling that this is not necessary the only thing that I should rely on.

What would be the contribution of other characteristics such as capacitance and inductance? are they going to be as important as the resistance?

I want to perform very accurate LCR measurement on a brand new DUT PCB and in the process of the stressing in the oven, I measure changes and compare them with the original measurements which I made in the first place.

Then what would be the conditions to tell if the PCB is going to fail if it stay for another X units of time in the test environment?

Please let me know if you need more information!

Answer 1

The first property to measure is the resistance.

You may consider measuring the inductance of traces and vias. It may show partial damage of some conductors (vias, most likely). However, the inductance we talk about is in nH range. Its measurement is a difficult task by itself.

And (most likely) the conductors that start degrading in such a way that you can find inductance variation, would be completely damaged after a few more thermal cycles or mechanical stresses (vibration).

Therefore my suggestion is to focus on resistance.

I do not see any reasons for capacitance change, until you do not exposed PCB to temperatures that exceed FR4 (or another PCB material) thermal rating. Yo can check FR4 glass transition temperature on Internet.

Answer 2

First response to what you write is:
One PCB is not a statistical sample size.

If you want any real information about failures in a product you design you need to test at the least a dozen, though most specifications require a hundred or more.

The same goes for your base of comparison: You need to test at least as many fresh PCBs to establish a baseline.

Of course if you're just getting your head around some design principles just doing one or two may be fine to get the coarse errors out, but just one or two is not a basis to guarantee anything for real-world use of a production series.

That said, if you have reason to be worried about failures at high temperature, just flopping the board through thermal cycles will not guarantee anything either.

Chips, transistors and currents create heat as well, so you need to establish whether the board will work when in operation at those thermal cycles as well as when it's powered off (if that is a remotely likely use case, at least).

For example a trace may not fail on your board when cycled from 10degrees C to 100degrees C and back a thousand times, but if the trace is carrying anything more than a simple (very) low current DC signal it may heat up for several degrees, or even a dozen or more. This influences your thermal cycle performance of that whole signal path.

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All that said I mostly agree with @Master.

Any mechanical stress the real world might throw at it needs to be included in your test.

And further a more than x-percent (10% for example) change in resistance over a good number of cycles is the best hint something is going wrong. Your exact acceptance criteria will depend largely on your design and requirements.

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Changes in Capacitance and Inductance are interesting, but only really if you are very strongly dependent on them, such as in high frequency signal paths, matched impedances and matched pairs. In which case you already know what your traces are designed for and what signal to use and measure to see if they have modified more than your design tolerance.

Mechanical stresses on the board, such as through imbalanced expansion and shrinkage of layers may cause micro fractures or increases in distances between planes and traces, so a good thing to do is run all your tests again while bending the board mildly in several directions all the way at the end, to increase the likelihood you find them.

Of course you're free to figure out even better plans to find such. I could envision some test plans including high voltage capable current sources while vibrating or bending the board. Sparking in micro cracks could be detectable in a dark environment, or afterwards by carbonation around them.