# Reasoning behind values of CE amplifier

I have the following circuit:

I am asked to choose values for the different components such that at the end, the amplifier meets certain requirements.

In the solutions, I am told that to minimise the effect of emitter degeneration, I should choose the impedance of the capacitor to be significantly smaller than that of 1/gm1. As an explanation the following circuit is given:

There are 2 logic steps that I cannot follow:

1. If we consider the impedance when looking into the emitter of the BJT (which is just 1/gm1 in the hand-drawn circuit) shouldn't it be 1/gm1 + (R1//R2)/(Beta+1) as the base doesn't go directly to an ac-ground.

2. Why would we consider v_in to drop over the node impedance looking into the emitter? Intuitively I'd assume we'd consider a potential divider between r_pi and the total emitter impedance divided by (Beta + 1)

This is why I don't follow step 1

• 1. Why do you say that the base is not AC grounded when you look into the emitter? – Linkyyy Nov 25 '18 at 16:25
• @Linkyyy I've added a sketch – Bula Nov 25 '18 at 16:43
• I rotated the first image for you. Could you fix the new one? – JRE Nov 25 '18 at 16:45
• The last drawing is wrong. RB1||RB2 is NOT in series with the base input path. – LvW Nov 25 '18 at 16:54
• At what frequency do you wish the Capacitor to have only a small effect on the circuit? Is 1% effect a safe value? Or 30% effect (about 3dB)? – analogsystemsrf Nov 25 '18 at 17:08

## 1 Answer

The equivalent circuit (on right) represents the original circuit (on left):

simulate this circuit – Schematic created using CircuitLab

I'm not sure if you consider this to be an equivalent to your hand-drawn picture at the bottom of your question. So take a look and see if you are okay with what I drew out, above-right. $$\C_1\$$ will charge up to an average voltage difference and will therefore appear as a kind of battery, as you show. But if so, then you missed out correctly also including the Thevenin source voltage. The reason I think this difference matters is because you need to be able to work out the DC operating point and you can't do that with the last image you show, alone.

Now to some of your questions...

If we consider the impedance when looking into the emitter of the BJT (which is just 1/gm1 in the hand-drawn circuit) shouldn't it be 1/gm1 + (R1//R2)/(Beta+1) as the base doesn't go directly to an ac-ground.

In active mode, the following (famous) portion of the Ebers-Moll model applies:

$$I_\text{C}=I_\text{SAT}\left(e^\frac{V_\text{BE}}{\eta \: V_T}-1\right)$$

Solving for $$\V_\text{BE}\$$ yields:

$$V_\text{BE}=\eta \: V_T\:\operatorname{ln}\left(\frac{I_\text{C}}{I_\text{SAT}}+1\right)$$

Normally, $$\\eta=1\$$ and the $$\+1\$$ term inside the logarithm is extremely tiny compared to the ratio term, so the above can often be simplified to:

$$V_\text{BE}\approx V_T\:\operatorname{ln}\left(\frac{I_\text{C}}{I_\text{SAT}}\right)$$

The dynamic emitter resistance is $$\\frac{\text{d}\:V_\text{BE}}{\text{d}\:I_\text{E}}\$$. We can also usually make the following approximation: $$\I_\text{E}\approx I_\text{C}\$$. So, by applying the differential operator:

\begin{align*} V_\text{BE}&\approx V_T\:\operatorname{ln}\left(\frac{I_\text{C}}{I_\text{SAT}}\right)\\\\\therefore\\\\ D\bigg[V_\text{BE}\bigg]&=D\left[V_T\:\operatorname{ln}\left(\frac{I_\text{C}}{I_\text{SAT}}\right)\right]\\\\ \text{d}\:V_\text{BE}&=V_T\:D\left[\operatorname{ln}\left(\frac{I_\text{C}}{I_\text{SAT}}\right)\right]\\\\ \text{d}\:V_\text{BE}&=V_T\:\left(\frac{D\left[I_\text{C}\right]}{I_\text{SAT}}\right)\\\\ \text{d}\:V_\text{BE}&=\frac{V_T}{I_\text{SAT}}\:\text{d}\:I_\text{C}\\\\\therefore\\\\ r_e=\frac{\text{d}\:V_\text{BE}}{\text{d}\:I_\text{C}}&=\frac{V_T}{I_\text{C}\approx I_\text{E}} \end{align*}

Or, in short, $$\r_e\approx \frac{1}{g_m}\$$.

Why would we consider v_in to drop over the node impedance looking into the emitter? Intuitively I'd assume we'd consider a potential divider between r_pi and the total emitter impedance divided by (Beta + 1)

Returning to the schematic on the right at the beginning of my answer, the impedance "seen" includes the series impedance of $$\C_1\$$ (hopefully small and able to be ignored, in most cases) and then also $$\R_\text{TH}\$$ in parallel with whatever the base of $$\Q_1\$$ presents (relative to some low-impedance voltage rail.) The dynamic resistance at the emitter tip is certainly part of this. And since $$\R_\text{E}\$$ is usually very much greater than $$\r_e\$$ and also the impedance of $$\C_2\$$ (you write that you *"should choose the impedance of the capacitor to be significantly smaller than that of $$\\frac{1}{g_m}\$$"), it won't have much impact because it is in parallel with $$\C_2\$$. So you can "mostly" ignore it as it won't much impact the AC impedance seen at the base of $$\Q_1\$$. So this just leaves $$\r_e\$$ in series with $$\Z_{C_2}\$$, really, times $$\\beta+1\$$ (because the base current is a small portion of the emitter current.)

So the impedance seen from the source will be $$\Z_{C_1}+R_\text{TH}\mid\mid\left[\left(\beta+1\right)\cdot\left(r_e+Z_{C_2}\right)\right]\$$. Since $$\Z_{C_1}\$$ and $$\Z_{C_2}\$$ should be negligible, this leaves $$\Z_\text{IN}\approx R_\text{TH}\mid\mid\left[\left(\beta+1\right)\cdot r_e\right]=R_\text{TH}\mid\mid r_\pi\$$ for your circuit.

(This is often a "contrary point" for this particular topology because $$\r_\pi\$$ is often quite small compared to $$\R_\text{TH}\$$ and it therefore does load down the input source so that the signal seen by the base of $$\Q_1\$$ is significantly diminished. You get high voltage gain, but to get it the input signal is also attenuated. You might be better off adding a series resistor to $$\C_2\$$, which then greatly reduces the loading at the input but also greatly reduces the gain. How all these trade-offs work out in the end is up to you to work out for any particular situation.)