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It is known that for smaller technologies, the channel length modulation effect is more prominent. However, is there any condition (biasing,voltage levels, transistor sizing ..etc) from which we can decide to reasonably neglect the channel length modulation effect in MOSFETs?

In a simple common source amplifier, if ro is much larger than any parallel resistance, we ignore it.

I also read that when Vds of a transistor is much larger that VDS,sat it is important to consider ro (I am not sure why though)

In other words, under which conditions we may assume that the channel length modulation has minimal effect on the gain,drain current etc.?

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    \$\begingroup\$ What instances of gain variation are you willing to ignore? \$\endgroup\$ – analogsystemsrf Feb 24 at 20:50
  • \$\begingroup\$ I modified my question for a better clarity \$\endgroup\$ – HaneenSu Feb 24 at 21:01
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It significantly depends on the situation, but usually you can use the simple equation:

$$r_0 \approx \frac{V_E\cdot L}{I_{DS}}$$

\$V_E\$ is the so-called Early voltage (similar to BJT's) in \$V/\mu m\$. This equation works pretty well even for smaller transistor features but more importantly, it tells you the basic trade-offs for the output impedance, even if you don't calculate it explicitly.

Once you have this rough estimate you can find out if your output impedance can be considered negligible.

For large \$v_{DS}\$, you may experience a decreased \$r_0\$ due to Drain-Induced Barrier Lowering (DIBL). The drain voltage then influences the threshold voltage in such a way that the drain current increases.

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Obviously for any circuit in which the drain-source impedance of the FET is not an important parameter.

It clearly depends on the circuit and biasing conditions, but that mostly only leaves source followers and many switching applications.

The approach I generally follow is to ignore it unless it’s patently obvious that it matters, and calculate it after the fact to check how it compares to the node impedance. This does mean that in some cases you would have to solve the circuit twice, but in real designs by hand it might simply require an approximate correction.

Ignore but verify.

In most cases, hand calculations only provide a ballpark figure anyway. Its value lies in providing insight and intuition into the effect of the different circuit elements.

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  • \$\begingroup\$ Sometimes the drain-source impedance of the FET is important, however, it can be valid to ignore it due to other conditions \$\endgroup\$ – HaneenSu Feb 24 at 20:47
  • \$\begingroup\$ @HaneenSu and that obviously depends on the circuit design and purpose. But, if you can ignore it, it’s obviously not important. \$\endgroup\$ – Edgar Brown Feb 24 at 20:48
  • \$\begingroup\$ @HaneenSu and notice that if you actually have to calculate it before you decide if you can “ignore” then you are not ignoring it, you are deciding after the fact that its effect is negligible. There is a difference. \$\endgroup\$ – Edgar Brown Feb 24 at 21:07
  • \$\begingroup\$ Sure. I think I mean to ignore it before doing any calculation as sometimes it adds extra difficulty in calculations. \$\endgroup\$ – HaneenSu Feb 24 at 21:14
  • \$\begingroup\$ @HaneenSu added some details, which might be more in line with what you want to know. \$\endgroup\$ – Edgar Brown Feb 24 at 21:29

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