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I have designed a 62 W, 24 V to 5 V buck converter operating at 250 kHz.

I am using TI's UCC27200A gate driver and Infineon's Optimos 4.

The problem is that the driver doesn't have any kind of isolation inside it, so any transient jitter on the buck converter's ground could potentially couple its way back to the microcontroller through the driver IC, killing both in the process.

I thought of using RECOM's isolated power supplies for powering the driver and the microcontroller.

Would this serve the purpose or should I consider using an op-amp voltage follower or consider replacing the gate driver IC altogether?

  • \$\begingroup\$ The question is not specific to the buck converter. Any power electronics which generates noise can potentially cause noise problems for a microcontroller that is driving it. The question is "has my design made adequate allowance for the eral world noise conditions?". Well?. Has it? An isolated connection will probably make good design easier. An opamp follower by itself will probably not make much difference. \$\endgroup\$
    – Russell McMahon
    Sep 13, 2019 at 9:11
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    \$\begingroup\$ 1) show the schematic 2) 999 out of 1000 Buck converters I have seen don't use isolated drivers and they're not damaging other circuits. Your statement "So any transient jitter on the Buck converter's ground could potentially couple it's way back to he Microcontroller through the driver IC killing both in the process." seems far fetched to me. In my opinion you really made a bad design and/or implemented it incorrectly (like using long and thin ground connections) to have this as an issue. \$\endgroup\$ Sep 13, 2019 at 9:12
  • \$\begingroup\$ @Bimpelrekkie Thanks for the response. I have added the schematic. Just so you know, I will be adding 10K resistors between the gates and sources of both mosfets although the schematic hasn't been updated to show that. \$\endgroup\$ Sep 13, 2019 at 16:46
  • \$\begingroup\$ @RussellMcMahon So what do you suggest ? \$\endgroup\$ Sep 13, 2019 at 16:46
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    \$\begingroup\$ There's still a HUGE difference between your schematic and that of a proper synchronous buck converter (for example figure 12 in maximintegrated.com/en/app-notes/index.mvp/id/2031 ). Yours is basically a half bridge and not much more than that. \$\endgroup\$ Sep 13, 2019 at 17:38

1 Answer 1


In the comments you say your concern is that noise could couple to the MCU through the driver's input pins.

According to the datasheet,

The input stages of the UCC27201A incorporate an open-drain configuration to provide the lower input thresholds. The input impedance is 200 kΩ nominal and input capacitance is approximately 4 pF. The 200 kΩ is a pulldown resistance to VSS (ground).

Absolute maximum voltage on inputs LI and HI is 20V, which indicates that they do not have protection diodes connected to Vcc. Therefore the only way that noise from the outputs can get back into the inputs is in reverse through the output driver, buffer, and input FET. With a Gate capacitance of just 4pF the noise will be greatly attenuated at the input pin, if it even gets that far.

One reason to use a driver IC is that it provides excellent protection against spikes coming back through the switching FETs. If enough noise does get back through the driver to affect the MCU then you probably have a more serious problem, such as the driver blowing up.

  • \$\begingroup\$ Thank you for the answer. I am just about starting with basics of CMOS design so almost all of what you said went over my head. Could you please elaborate further with an internal diagram of a gate driver IC ? The one that I will be using has a CMOS logic instead of TTL. Really appreciate the help. Thanks again ! \$\endgroup\$ Sep 14, 2019 at 4:15
  • \$\begingroup\$ Also, do you have any other suggestions looking at the schematic ? \$\endgroup\$ Sep 14, 2019 at 4:20
  • \$\begingroup\$ Your schematic is incomplete so I can't say much about it. The CMOS input version (UCC27200A) needs 8V (minimum) logic levels so it cannot be driven directly from an MCU. \$\endgroup\$ Sep 14, 2019 at 6:31
  • \$\begingroup\$ What's missing in the schematic ? \$\endgroup\$ Sep 14, 2019 at 9:02

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