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My question is on bipolar junction transistors, NPN with 2 emitters, as used in TTL NAND gates.

When in reverse active mode, and when the 2 emitter are logic high, how is the collector current calculated?

Since there are 2 emitters, should I add 2 currents: 2 * βr * Ib ?

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when in reverse active mode, and 2 emitter are in logic high, how is the collector current calculated ?

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Both emitters are reverse biased and Q1’s collector current is wholly sourced via the base resistor with the base-collector region acting as a forward biased diode.

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    \$\begingroup\$ Not quite - there will be some transistor action in reverse mode so some current will be sourced from the inputs. For standard TTL the transistor design is such that the current will be maximum of 40uA per input. So the collector current will be the base current plus the two emitter currents. \$\endgroup\$ Commented Jan 11, 2020 at 18:11
  • \$\begingroup\$ The input levels would have to be below Vcc for this to take place but generally, I take your point. \$\endgroup\$
    – Andy aka
    Commented Jan 11, 2020 at 18:16
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    \$\begingroup\$ No; when the input level is at a logic one (>2.4V for TTL) the preceding stage has to source current as the emitter pins act as collectors. The actual collector pin is lower in voltage than the base and the base current causes a current to flow in the collector path. The reverse beta is extremely low in this configuration hence only 40uA max even with ~1mA base current. \$\endgroup\$ Commented Jan 12, 2020 at 0:06
  • \$\begingroup\$ How to see both emitters are reverse biased ? Is it because in npn transistor , emitter is of n-type and we are giving positive voltage to it, is that the reason ? Pardon me, but I am beginner in electronics that's why asking. \$\endgroup\$ Commented Mar 31, 2023 at 6:25
  • \$\begingroup\$ yes, because it's an npn transistor. \$\endgroup\$
    – Andy aka
    Commented Mar 31, 2023 at 9:31

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