Toggle flip-flop for voltage higher than logic levels

Question

I need a T flip-flop for 24 V. The purpose is to take a 24 V, 50% duty cycle, 0.5 Hz pulse wave and halve its frequency to 0.25 Hz, so that the output wave toggles between 0 and 24 V at the input's rising edge.

I know one solution is to use an impulse latch relay, but those are quite large and expensive.

Since logic circuits for 24 V are uncommon, relays or transistors would be most suitable.

There is one solution demonstrated by CreativE EngineerinG (link) which I have replicated in the Falstad simulator (link), but the simulation does not work properly. I'm unsure about this solution because the simulation does not work and because I need to purchase the components before constructing the circuit, so I must be sure that it works. Plus, this solution is for 5 V and not 24 V, so the components values must be different, and higher power BJTs will have different internal characteristics.

What is the best solution (preferably one that can be simulated)?

Answer 1

Thyristor T Flip- Flop. It can be made for any voltage and can be controlled with a lower voltage. Through the capacitor (1u) the switching on one thyristor switches off the other.

In principle, there could be only one problem with it if the two thyristors ignite at the same time at the first moment. In practice, this has never occurred due to manufacturing tolerance. It can also be prevented with minimal asymmetry of (gate) parts. It works for sure for 10 pieces, a long time ago I built a decade counter from them. :)

For simulation give C1 a starting voltage of 3-4V (asymmetry) and it will work afterwards.

Answer 2

Scale the input to work with a regular 5V logic IC, such as the 74HC74, and roll your own 24V output stage:

Here's one you can simulate right here in CircuitLab:

^{simulate this circuit – Schematic created using CircuitLab}

Answer 3

If you're OK with relays, then an impulse relay is not really needed. Synchronous circuits can be easily made with relays. Let's start with the basic idea. BUF1 and BUF2 are delay or "inertial" elements.

^{simulate this circuit – Schematic created using CircuitLab}

The muxes lend themselves easily to relay implementation. Below, RLY1A and RLY1B are two halves of a DPDT relay.

^{simulate this circuit}

Now, the buffers and inverters can be replaced with SPDT relays. Their main purpose is adding a bit of mechanical inertia (delay) to the system:

^{simulate this circuit}

Three relays and you have a cromulent relay-logic T-FF. If the clock (T) signal can have "messy" edges, a buffer relay would have to be added to that input to ensure correct operation. Alternatively, additional SPST delay elements can be added:

^{simulate this circuit}

Trivia: The T-FF above, when put together using fast reed relays, will toggle well above 1kHz. Since NC contacts are slow and wear out faster, low-power reeds make possible an "NMOS" implementation with just SPST reeds and NMOS-style inverters. I think the fastest I got it to go was 5kHz. I think Mr Zuse would have got a kick out of that.

And some people would think that a relay homebrew computer hobby is useless in modern times :)

Answer 4

It's amusing to compare the solutions above to old ideas from the era of expensive components and more concrete thinking. Here's a circuit from the 1962 GE Transistor Manual.

Switch from Ge PNPs to general purpose Si NPNs, increase the collector and base resistances by 5x, and I think it would solve this problem.

Answer 5

Discrete CMOS made from small-signal P- and NMOS tranistors should work nicely, as long as they are rated for 50V minimum drain-source voltage.

A basic T-FF in a logic IC can be built using transmission gates:

^{simulate this circuit – Schematic created using CircuitLab}

Since proper transmission gates can't be made using discrete 3-pin FETs, as there's no separate body/substrate terminal, we can do with 3-state buffers instead:

^{simulate this circuit}

A 3-state buffer made using discrete MOS transistors looks as follows:

^{simulate this circuit}

To save some transistors, we can use the inverted output of the buffer directly:

^{simulate this circuit}

Now, using transistors:

^{simulate this circuit}

That circuit has no static current consumption (only leakage currents). R1,R2 protect the output drivers from short circuits. R3,R4 protect the input inverter from excessive shoot-through currents when the CLKIN has too slow of a rise/fall time.

We can now share the output control transistors and use isolation diodes instead, saving 4 transistors:

^{simulate this circuit}

Small signal diodes and small-signal mosfets are available as pairs in a single package, so this circuit would use 11 mosfet pairs, 4 diode pairs, and 4 resistors. It would easily fit on a little plug-in PCB the size of a DIP14 chip or smaller, using SMT parts.

I will probably put this one together just to see how it works in reality.

Note: Higher-threshold voltage devices are preferable to low-threshold ones for a 24V application.