# Are there logic gates by which a signal could propagate backwards?

Is there a type of logic gate with floating inputs (I'm using that term loosely) such that a fixed voltage on an output could "propagate backwards?" Let me clarify with examples...

Say you had an AND gate with one input fixed at 5V (assuming binary 0/1 represented by 0V/5V, respectively), the other input unconnected, and the output unconnected. Then you connect the output to 5V. Is there a type of gate (material/construction) for which the voltage of the remaining unconnected gate would then go to 5V, since that is the only binary value/voltage that satisfies the AND truth table, given the voltages of the other connections?

Furthermore, could such behavior propagate backwards to earlier gates? Imagine two AND gates connected as described by:

out = AND2(AND1(x, y), z)


If y, z, and out are all fixed a 5V (binary 1) and x is unconnected, might the output of the AND1 gate (unnamed input to the AND2 gate) be forced to 5V, and subsequently the x input of AND1 be forced to 5V?

Finally, if there indeed is a type of logic gate that exhibits the behavior described above, what would happen when fixed connections result in an unsatisfiable condition? For example, under the equation/connections described above, out==1, z==1, y==0? In which case there is no value of x that would result in a state of the composite circuit that is in the composite truth table.

• You could probably wire something together with open-collector/open-drain gates and perhaps a few diodes. Is there a specific application you had in mind?
– vir
Aug 19, 2021 at 16:10
• It's probably possible, but this would be treated as undefined behaviour of floating inputs, and driven outputs. Any "real" input would override the signal. Forcing the output to high and one of the inputs low will cause the gate to output low (since it's a normal gate) but since the output is also being forced high some part will overheat. Aug 19, 2021 at 16:16
• what would happen when fixed connections result in an unsatisfiable condition... a ring oscillator comes to mind (a loop of an odd-number of inverters). Because of propagation delay, and finite rise/fall time, it oscillates. However, signal flow is in one direction only, not as your initial proposition. Aug 19, 2021 at 16:46
• Well, I had to remove my answer, thought it was good (and truth) but did not entertain people, I guess. Once I was deep in Ternary logic, and I understand what you are doing. But do not understand why you are doing so. I am curious to ...D.. Would you please share the reasoning behind?
– jay
Aug 19, 2021 at 17:29
• if i understand you right, the answer is no because such ICs use transistors, which are akin to controllable yet one-way valves. Aug 19, 2021 at 21:19

It appears that what you're looking for in the first question is some logic that has the following truth table:

Fixed input, DesiredOutput (another "input"), Other input (actually, truth table output):

0,X,1 (or zero, but I have to choose 1)
1,1,1
1,0,0


That logic could be built with some gates. You could extend this to more levels such as your second question.

NO

You can try to change input states by capacitive coupling a glitch on the output to toggle states, using Miller capacitance, but that would be a transient. High Z inputs floating are prone to all kinds of stray crosstalk. so this is not useful.

You might see an effect with a NAND , NOR, INV. But not with AND, OR as these are double buffered. Of course this depends on crosstalk on the layout.

You can however, toggle the output state of a Flip Flop, by back driving a current glitch of opposite polarity. So FF’s make poor long cable drivers.

All digital logic devices are “analog”. To understand fault conditions you propose, you must examine the analog conditions like reverse gain which is very low.

Why not test your theory with controlled impedance and responses? With adjustable floating bias and very high Z buffered probes. It might be a waste of time, but then you may learn some things about crosstalk.

YES.

There are some exotic forms of logic that use transistors as pass gates rather than in normal fully-complementary form. For such gates it is possible that a change in voltage at one input could cause a change in voltage at another input if that other input was left disconnect (floating). But that would normally be considered a design error.

Here's an example of an AND gate made with pass-transistor logic: https://www.electronics-tutorial.net/Digital-CMOS-Design/Pass-Transistor-Logic/

Say you had an AND gate with one input fixed at 5V (assuming binary 0/1 represented by 0V/5V, respectively), the other input unconnected, and the output unconnected. Then you connect the output to 5V. Is there a type of gate (material/construction) for which the voltage of the remaining unconnected gate [input] would then go to 5V

Yes. A diode AND gate will do that.

Furthermore, could such behavior propagate backwards to earlier gates? Imagine two AND gates connected as described by:

out = AND2(AND1(x, y), z)


If y, z, and out are all fixed a 5V (binary 1) and x is unconnected, might the output of the AND1 gate (unnamed input to the AND2 gate) be forced to 5V, and subsequently the x input of AND1 be forced to 5V?

Yes. Here's an example:-

simulate this circuit – Schematic created using CircuitLab

Under normal conditions input x would be 'floating' and able to be pulled down easily through the two 1 kΩ resistors. However with 5 V applied to the output, x can only be pulled low by 2 diode voltage drops (~1 V at 30 mA).

Finally, if there indeed is a type of logic gate that exhibits the behavior described above, what would happen when fixed connections result in an unsatisfiable condition?

Possible effects could include:-

• Excessive current draw resulting in an overloaded power supply, burned out components etc.

• Misoperation of other logic connected to the gate inputs.

With careful design it may be possible to avoid these effects. On the other hand with a poor design it can occur unintentionally.

For example you might decide to slow down the output rise time of a diode AND gate by adding a capacitor to ground. When the output is high it charges the capacitor to 5 V, which then has to be discharged by whatever is driving the inputs. Both inputs are forced high until the capacitor discharges!

This could be bad news if you were controlling the gate from eg. a PIC MCU using read-modify-write instructions that read the state of the I/O pin during operation. If the pin takes longer than 1 instruction cycle to go low the modified output could be wrong.