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I need help in understanding the function of the PMOS differential telescopic cascode amplifier.

For the NMOS counterpart, we are calculating the voltage gain as $$-g_{m1}{(g_{m3}r_{o1}+1)r_{o1} + r_{o3} } \parallel { (g_{m7}r_{o7}+1)r_{o5} +r_{o7} }$$

What will be the voltage gain of the PMOS differential telescopic cascode amplifier with NMOS load, will it be the same as NMOS differential pair or low/high?

enter image description here

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  • \$\begingroup\$ Just translate the transistor numbers (as your equations don't match the schematic). In that case, the equations are identical, with parameter values of PMOS swapped for NMOS. \$\endgroup\$
    – pat
    Commented Oct 14, 2021 at 19:57
  • \$\begingroup\$ Thanks for the reply, so the voltage gain can be approximated to the above circuit as Voltage gain = (-gm1)*(ro2*gm4*ro4 || ro6*gm8*ro8) ? \$\endgroup\$
    – Azure Here
    Commented Oct 16, 2021 at 22:47
  • \$\begingroup\$ Yes, that looks right. \$\endgroup\$
    – pat
    Commented Oct 16, 2021 at 22:49

2 Answers 2

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The expression for the gain in PMOS telescopic cascode is the same, but, because the PMOS have ~2-3 tines less mobility than an NMOS, they need to be about the ~2x-3x bigger in area to have the same transconductance.

However, that sounds like there's no reason to use a PMOS differential input stage. Let me give you 2 reasons in favor of a PMOS input stage:

  1. You might need to amplify a voltage whose nominal bias is more than half your VDD. Say your supply is 1.8V, if the signal you need to amplify comes around .8V or 1V, I'd suggest you use a PMOS input stage, as it accomodates that voltage better than an NMOS does (An NMOS will probably be in the linear region and might need to be much bigger to put it into strong/moderate inversion).

  2. PMOS have less 1/f noise (aka flicker noise) for the same sized NMOS. This is important in case your signal also has valuable information at frequencies below 1MHz.

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  • \$\begingroup\$ Regarding 1/f noise, I thought it was related to the oxide/channel interface quality. In case this is true, why would this differ for N or P doped channels ? \$\endgroup\$
    – tobalt
    Commented Nov 29, 2022 at 8:28
  • \$\begingroup\$ It stems from the electron/hole collisions. If we have more of that, then the larger is the 1/f noise. Electrons have more mobility than holes, so, in average, more of them will collide, thus more noise. \$\endgroup\$
    – Designalog
    Commented Dec 2, 2022 at 13:32
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Mobility of PMOS is usually smaller than NMOS, normally 3 times smaller so if you use the same current, same size then gain of PMOS diff input would be lower than NMOS input.

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