I'll give a background to my main question:-
In a simple NMOS as shown, while constructing the small signal model of the MOSFET, when there is no resistance between Vdd and drain, NMOS is modeled only as a current source with id = gm*vin.
But now, when we put Rd, the drain voltage now also varies as
Vd + vd = Vdd - (Id+id)*Rd
(Upper case letters depict currents and voltages due to biasing and lower case letters depict small signal currents and voltages.)
Now, because of this variation in Vd, an ro is introduced in the small signal model.
(Background ends here)________________________________________
Now, in a cascode amplifier such as this:-
Here, there is no R(resistor) anywhere.I'm unable to reason out why drain voltage of M4 varies. Hence, what I think is that modelling M4 with and r04 in its small signal model wouldn't be correct. And hence, as I think that drain voltage of M4 should be constant, so should be the drain voltage of M3, and so, Vout should be constant. Please tell if Vout varies or not varies for this cascode amplifier.